Sr Datacenter GPU Lead Power Constrained Performance Architect

AMD; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is seeking a skilled engineer to lead power-constrained performance modeling for Instinct AI/ML/HPC accelerators, guiding target setting across concept to post-launch. You will partner with architecture, SOC design, CAD, foundry, and software teams to optimize power and performance.

You will mentor engineers, drive post-Si calibration, and contribute to workload power analysis while communicating results to executives.

Qualifications

• Background in Computer Architecture, Processor/Accelerator development.
• Experience in Power/Performance projections, modeling and optimization at SoC or System level.
• Familiarity with digital logic physical design and power management techniques (clock gating, power gating, V-F curves, p-states, on-die voltage regulation, clock integrity, etc.).
• Familiarity with post-silicon power/performance debug, model correlation.
• Fluency in communicating with various engineering teams, business leads and executive management.
• Knowledge of DL/ML/LLM/MoE workloads will be a bonus.

Responsibilities

• Own power-constrained performance modeling, projections and target setting from concept to product launch for AMD Instinct accelerators.
• Define product configurations, capabilities and P&P targets with business units and architecture.
• Lead cross-functional P&P attainment with SOC architecture, system, IP, circuit, foundry, CAD and software teams.
• Roll-up Power/Performance readouts and present to executives; drive power efficiency improvements.
• Mentor junior engineers and develop methods for PPA in several SoC stages and workloads.

Skills

Computer Architecture

Power/Performance projections

Digital logic power techniques

Post-silicon power/debug

Cross-functional communication

DL/ML/LLM workloads knowledge

Education

Bachelor’s or Master’s in CS/CE/EE

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

Key Responsibilities

• Own power-constrained performance modeling, projections, implementation target setting and attainment tracking from Concept-exit (pre-si) to Product launch (post-si) for AMD Instinct AI/ML/HPC accelerators
• Work with business unit and product architecture to define product configurations, capabilities and P&P targets
• Cross functionally lead P&P attainment by working with various engineering functions including SOC architecture, System Design, IP Design, Circuit Design, Foundry team, CAD, Physical Design, Software, Power Management, Post-si validation
• Roll-up Power/Performance readouts, present in executive forums, motivate cross-functional teams on power efficiency improvements
• Mentor junior engineers and develop skillsets and methodologies in the team for important PPA domains like Power Modeling at various stages of SoC development, Cdyn/Leakage/STA/Area trade-offs and attainment, Silicon Power/Performance debug, Post Si calibration of models, Work-load power analysis

Key Qualifications

• Background in Computer Architecture, Processor/Accelerator development
• Experience in Power/Performance projections, modeling and optimization at SoC or System level
• Familiarity with digital logic physical design and power management techniques (clock gating, power gating, V-F curves, p-states, on-die voltage regulation, clock integrity, etc..)
• Familiarity with post-silicon power/performance debug, model correlation
• Fluency in communicating with various engineering teams, business leads and executive management
• Knowledge of DL/ML/LLM/MoE workloads will be a bonus

Education

• Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or related

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.