Senior Data Verification Engineer - Onsite in San Jose

Quest Global; San Jose (CA); On-site; USD 103,000 - 124,000; Full time

Job summary

Quest Global is seeking a Senior DV Engineer to lead end-to-end design verification activities for IP, Subsystem, or SoC-level projects in onsite San Jose, CA. You will collaborate with design, architecture, and customer teams to achieve verification closure with high quality.

Required expertise includes HVL (UVM/SystemVerilog/OVM), C/C++, Perl, TCL, and verification methodologies. You will work closely with engineers across divisions and remote locations to deliver robust solutions and resolve

Qualifications

• Experience in SOC verification with ARM cores and interfaces like AHB/AXI/PCIe
• Strong programming in C/C++, Perl, TCL and HVL-based verification
• Excellent communication and ability to work with global teams

Responsibilities

• Lead end-to-end design verification of IP/Subsystem/SoC.
• Collaborate with design, architecture and customer teams to drive verification closure.
• Provide technical ownership and mentoring to verification engineers

Skills

HVL

UVM

SystemVerilog

OVM

C/C++

Perl

TCL

Verification methodologies

Education

BE/BTech/MTech in Electronics/Electrical

Tools

EDA tools

Job description

Quest Global is seeking a Senior DV Engineer to lead end-to-end design verification activities for IP, Subsystem, or SoC-level projects in onsite San Jose, CA. You will collaborate with design, architecture, and customer teams to achieve verification closure with high quality.

Required expertise includes HVL (UVM/SystemVerilog/OVM), C/C++, Perl, TCL, and verification methodologies. You will work closely with engineers across divisions and remote locations to deliver robust solutions and resolve