Senior CPU RTL Engineer, Silicon

Google LLC; Austin (TX); Presencial; USD 163 000 - 236 000; Tempo integral

Resumo da oferta

Google LLC is seeking a senior hardware engineer to contribute to CPU frontend designs, focusing on microarchitecture and RTL design for a next generation CPU. You will propose performance-enhancing features and work with architects and performance teams to study trade-offs.

The candidate will deliver designs that meet strict Power, Performance, and Area goals with production-ready quality and will collaborate with a team developing custom silicon solutions for Google's direct-to-consumer

Qualificações

• Bachelor's degree and 8 years of experience in digital logic design, RTL design, and Verilog/SystemVerilog.
• Experience with logic synthesis techniques to optimize RTL code, performance and power, including low-power design techniques.

Responsabilidades

• Contribute to CPU frontend designs, emphasizing microarchitecture and RTL design for the next generation CPU.
• Propose performance-enhancing microarchitecture features with trade-off studies.
• Communicate pros and cons of microarchitecture enhancements.
• Deliver designs meeting Power, Performance and Area (PPA) goals with production quality.

Conhecimentos

Digital logic design

RTL design

Verilog

SystemVerilog

Power and performance optimization

Formação académica

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's degree or PhD in Electrical/Computer Engineering or Computer Science (emphasis on computer architecture)

Ferramentas

Verilog

SystemVerilog

Descrição da oferta de emprego

corporate_fare Google place Austin, TX, USA

X In most instances, this position requires in-person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  
• 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
• Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Be part of a different team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google .

• Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
• Propose performance enhancing microarchitecture features with efficiency in mind. Work with architects and performance teams for trade-off studies.
• Communicate pros and cons of microarchitecture enhancements. Facilitate final decision making.
• Deliver designs meeting Power, Performance and Area (PPA) goals with production quality.
• Become familiar with techniques for at least one processor functional block. Interpret the techniques into design constructs and languages in order to provide guidance to and participate in the performance modeling effort.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

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