Senior CPU Microarchitecture & RTL Design Lead

GlobalFoundries; Santa Clara (CA); On-site; USD 188,000 - 325,000; Full time

Job summary

GlobalFoundries is seeking a Senior Principal IP Design Engineer in Santa Clara to lead and own RTL development for efficient, low-power CPU cores. You will drive multiple micro-architecture strategies, ensuring performance and area optimizations while assisting in functional verification.

The ideal candidate has a strong background in microprocessor architecture and a Master's degree with extensive experience. This role offers competitive compensation and the opportunity to work with cutting-edge technology.

Qualifications

• Hands-on working knowledge of CPU core pipeline stages.
• Expertise in instruction fetch, decode, and execution.
• Knowledge of timing and power implications in design.

Responsibilities

• Define and own the RTL development of CPU cores.
• Collaborate with teams on physical design validation.
• Drive architecture exploration and specification.

Skills

Pipeline stages knowledge

Microprocessor architecture expertise

System Verilog, Verilog and/or VHDL

Waveform debugging tools experience

Scripting language (Perl/Python)

Education

Master's degree with 8-11 years of experience or PhD with 5-7 years

Job description

GlobalFoundries is seeking a Senior Principal IP Design Engineer in Santa Clara to lead and own RTL development for efficient, low-power CPU cores. You will drive multiple micro-architecture strategies, ensuring performance and area optimizations while assisting in functional verification.

The ideal candidate has a strong background in microprocessor architecture and a Master's degree with extensive experience. This role offers competitive compensation and the opportunity to work with cutting-edge technology.