Senior CPU Architect - Performance & Microarchitecture Lead

Socket.dev; Mountain View (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google's CPU team in Mountain View, CA seeks a senior architect to tackle complex CPU performance and microarchitecture challenges. You will collaborate with RTL, design verification, and physical design to deliver high-performance CPU implementations.

This role requires deep expertise in CPU architecture, ISA knowledge (ARM/RISC-V/x86), and strong modeling skills. You will define specifications, evaluate features, and drive pre- and post-silicon performance analysis.

Qualifications

• Bachelor's degree or equivalent practical experience in EE/CE/CS
• 10 years of experience in microprocessor architecture and design
• Experience with CPU architecture and performance modeling, analysis, correlation, and workload characterization
• Experience with processor instruction set architectures (ARM, RISC-V, x86) and Linux drivers/runtime

Responsibilities

• Deliver solutions to complex CPU performance and microarchitecture problems.
• Plan, drive, and evaluate ARM architecture features from architecture and performance angles.
• Define and write CPU subsystem architecture specifications.
• Lead collaboration with RTL, design verification, and physical design teams for high performance CPU implementations.
• Drive performance correlation between models and RTL and triage pre/post-silicon issues.

Skills

Microprocessor architecture

Performance modeling

CPU architecture

ISA knowledge (ARM/RISC-V/x86)

Linux drivers/software

Education

Bachelor's degree in EE/CE/CS or equivalent

Master's or PhD in EE/CE/CS (preferred)

Job description

Google's CPU team in Mountain View, CA seeks a senior architect to tackle complex CPU performance and microarchitecture challenges. You will collaborate with RTL, design verification, and physical design to deliver high-performance CPU implementations.

This role requires deep expertise in CPU architecture, ISA knowledge (ARM/RISC-V/x86), and strong modeling skills. You will define specifications, evaluate features, and drive pre- and post-silicon performance analysis.