Senior CPU Architect — High‑Frequency, Power & Equity

NVIDIA Corporation; Santa Clara (CA); Presencial; USD 272.000 - 431.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Equity

Benefits

Descripción de la vacante

NVIDIA is seeking a senior CPU architect in Santa Clara to lead high-frequency, server-class processor design, spanning architecture, RTL, and physical implementation. The role emphasizes power delivery, thermal constraints, and packaging, with extensive experience across SW, RTL, and VLSI disciplines.

Applicants should have 15+ years in CPU development, a deep understanding of process technologies, and strong collaboration skills.

Formación

• BS/MS in Electrical Engineering, Computer Science, or equivalent experience.
• 15+ years of relevant experience in CPU architecture and high-frequency server CPU design.
• Solid understanding of power dissipation, delivery, and efficiency concepts.
• Detailed understanding of process technologies and circuit design.
• Knowledge of tradeoffs related to advanced packaging techniques.
• Experience spanning SW, Architecture, RTL, VLSI, and process for power management.

Responsabilidades

• Bridge the gap between architecture, RTL implementation, and physical design.
• Serve as subject matter expert on power delivery/regulators, power gating, di/dt, and thermal throttling.
• Analyze power trade-offs for different die stacking and packaging proposals.
• Propose and drive improvements related to high-frequency design and power methodology for our custom CPU cores.

Conocimientos

CPU architecture

High-frequency design

Power management

RTL

Physical design

Process technology

Packaging

VLSI

Team collaboration

Educación

BS/MS in Electrical Engineering / Computer Science / Computer Engineering

Descripción del empleo

NVIDIA is seeking a senior CPU architect in Santa Clara to lead high-frequency, server-class processor design, spanning architecture, RTL, and physical implementation. The role emphasizes power delivery, thermal constraints, and packaging, with extensive experience across SW, RTL, and VLSI disciplines.

Applicants should have 15+ years in CPU development, a deep understanding of process technologies, and strong collaboration skills.