Senior Chiplet Packaging Engineer - 2.5D/3D Architect

Rapidus Corporation US; Santa Clara (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Rapidus Corporation is seeking a highly motivated Chiplet Package Design Engineer to drive the development of advanced packaging solutions for next-generation semiconductor products. This role focuses on 2.5D and 3D heterogeneous integration, enabling high-performance computing, AI, networking, and advanced SoC platforms.

The candidate will work cross-functionally with silicon design, system architecture, manufacturing, and OSAT partners to deliver cutting-edge chiplet-based packaging solutions.

Qualifications

• B.S. or M.S. in Electrical Engineering, Mechanical Engineering, Materials Science, or related field
• 5+ years of experience in semiconductor package design, especially advanced packaging
• Hands-on experience with 2.5D/3D packaging technologies (silicon interposer, TSV, hybrid bonding)
• Strong knowledge of high-speed interfaces and package-level SI/PI considerations
• Experience with Cadence Allegro Package Designer, Sigrity, Ansys HFSS, RedHawk-SC Electrothermal
• Understanding of package manufacturing processes and OSAT ecosystem
• Ability to work in cross-functional and global teams

Responsibilities

• Lead the design and development of 2.5D/3D package architectures (interposer-based, fan-out, 3D stacking)
• Define and optimize chiplet integration strategies, including die partitioning and interconnects
• Develop package layout and routing for high-speed/high-density interconnects
• Perform and guide signal integrity, power integrity, and thermal analysis
• Collaborate with silicon teams on bump/pad design, floorplanning, and co-design
• Drive package-substrate co-design including material selection and stack-up
• Interface with OSATs and foundries for manufacturability and yield
• Support DFx and reliability validation (warpage, stress, electromigration)
• Contribute to package technology roadmap for 2nm and beyond
• Participate in bring-up, validation, and failure analysis of packaged devices

Skills

Semiconductor package design

2.5D/3D packaging technologies

High-speed interfaces

Signal integrity

Power integrity

Thermal analysis

OSAT ecosystem knowledge

Cross-functional collaboration

Education

Bachelor's or Master's in EE/Mech/Materials or related

Tools

Cadence Allegro Package Designer

Sigrity

Ansys HFSS

RedHawk-SC Electrothermal

Job description

Rapidus Corporation is seeking a highly motivated Chiplet Package Design Engineer to drive the development of advanced packaging solutions for next-generation semiconductor products. This role focuses on 2.5D and 3D heterogeneous integration, enabling high-performance computing, AI, networking, and advanced SoC platforms.

The candidate will work cross-functionally with silicon design, system architecture, manufacturing, and OSAT partners to deliver cutting-edge chiplet-based packaging solutions.