Senior CAD Engineer, Physical Verification

Microchip Technology; United States; On-site; USD 120,000 - 170,000; Full time

Job summary

Microchip Technology Inc's CAD group is seeking a seasoned professional to develop and support physical verification flows for multiple PDKs across process technologies, focusing on back-end verification. The candidate will work with Calibre, Pegasus, and related tools to streamline regression tests and improve reliability.

The role requires 7.5–10 years of experience, strong SVRF/TVF knowledge, and proficiency in Tcl/Tk, Perl, and Python.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 7.5–10 years of experience in physical verification development and support.
• Deep knowledge of Calibre DesignRev scripting.
• Fluent with SVRF and TVF.
• Debug PV issues with RVE, Vue or other EDA visualizers.
• Proficient in Tcl/Tk, Perl, Python and other scripting languages.
• Strong understanding of layout rules, foundry rules, and design for manufacturability.
• Experience with Calibre/Pegasus/Hercules syntax and semantics.
• Experience with Cadence Virtuoso and/or CalibreDRV.
• Excellent verbal and written communication and interpersonal skills.

Responsibilities

• Develop physical verification regression test cases to QA physical verification decks.
• Support Layout and Design engineers with physical verification activities using verification tools such as Siemens Calibre, Cadence Pegasus, or Synopsys Hercules.
• Utilise Knowledge of advanced EDA methods to support ESD, ERC, Voltage-Aware DRC, via doubling methodologies, etc.
• Work with Technology Development and Device Engineering to develop DRC rules, additional devices, and design for manufacturability checks.
• Develop rule decks as needed to support flow.
• Verify and enhance foundry rule decks.
• Support remote sites worldwide with layout verification activities.
• Support debug of physical verification issues.
• Work as a member of team to develop flows to improve quality and reliability of devices.

Skills

EDA scripting

SVRF

TVF

Tcl/Tk

Python

Debug PV issues

Communication

Team collaboration

Foundry rules understanding

Education

Bachelor's in Electrical Engineering

Master's in Electrical Engineering (Preferred)

Tools

Calibre

Pegasus

Hercules

CalibreDRV

Cadence Virtuoso

Job description

Microchip Technology Inc's CAD group is seeking a seasoned professional to develop and support physical verification flows for multiple PDKs across process technologies, focusing on back-end verification. The candidate will work with Calibre, Pegasus, and related tools to streamline regression tests and improve reliability.

The role requires 7.5–10 years of experience, strong SVRF/TVF knowledge, and proficiency in Tcl/Tk, Perl, and Python.