Lead Full-Chip Physical Verification Engineer

Celero Communications

San Jose (CA)

On-site

USD 150,000 - 250,000

Full time

29 hours ago
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Job summary

Celero Communications, Inc. is seeking a Full-Chip Physical Verification Engineer to own all aspects of PV execution on advanced nodes.

You will lead full-chip and block PV checks, drive schedules, and ensure tapeout readiness while collaborating with Analog and Physical Design teams to meet performance and manufacturability targets. The role requires a 7+ year track record in full-chip PV, experience with ICV/Calibre, and scripting skills in Python/Tcl.

Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering or related field.
  • 7+ years of experience with full-chip verifications.

Responsibilities

  • Lead full chip Physical Verification effort.
  • Own execution plans and schedules for full-chip PV.
  • Drive accountability for quality, milestones, and tapeout readiness.
  • Conduct full chip and blocks PV checks.
  • Own the full chip verification scope.
  • Collaborate with analog team to ensure clean IP delivery.
  • Run and analyze DRC/ERC/LUP/PERC results.
  • Use ICV or Calibre verification tools.
  • Understand advanced TSMC DRC rules.
  • Partner with analog/block/chip top owners for clean floorplan.
  • Provide guidance on corner-case requirements.
  • Influence floorplan constraints, hierarchy and implementation strategy.
  • Participate in tapeout readiness reviews.

Skills

Full-chip PV
Team leadership
PV execution planning

Education

Bachelor’s or Master’s in Electrical Engineering

Tools

ICV
Calibre
Python
Tcl
Shell scripting

Job description

Celero Communications, Inc. is seeking a Full-Chip Physical Verification Engineer to own all aspects of PV execution on advanced nodes.

You will lead full-chip and block PV checks, drive schedules, and ensure tapeout readiness while collaborating with Analog and Physical Design teams to meet performance and manufacturability targets. The role requires a 7+ year track record in full-chip PV, experience with ICV/Calibre, and scripting skills in Python/Tcl.

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