Senior CAD & Design Methodology Architect - RTL-to-GDSII

Eliyan; San Francisco (CA); On-site; USD 150,000 - 200,000; Full time

Job summary

Eliyan in San Francisco is looking for a Sr Staff / Principal CAD & Design Methodology Engineer to lead the development of RTL-to-GDSII flows for advanced SoC products. You will own the system architecture spanning multiple foundry nodes, ensuring scalable, high-quality tapeouts.

The ideal candidate will have over 15 years of experience in ASIC CAD with a proven record in multi-foundry deployments and deep expertise in low-power design methodologies.

Qualifications

• 15+ years of experience in ASIC CAD and design methodology.
• Deep expertise in UPF/CPF flows and multi-voltage domain integration.
• Proven expertise in clocking methodologies like Clock Mesh and H-Tree.

Responsibilities

• Architect, develop and maintain RTL-to-GDSII digital implementation flow.
• Collaborate with foundry technology teams for node-specific methodologies.
• Drive continuous improvement of CAD infrastructure through automation.

Skills

Low-power design methodology

ASIC CAD experience

Multi-node, multi-foundry deployment

Clocking methodologies

Problem-solving ability

Job description

Eliyan in San Francisco is looking for a Sr Staff / Principal CAD & Design Methodology Engineer to lead the development of RTL-to-GDSII flows for advanced SoC products. You will own the system architecture spanning multiple foundry nodes, ensuring scalable, high-quality tapeouts.

The ideal candidate will have over 15 years of experience in ASIC CAD with a proven record in multi-foundry deployments and deep expertise in low-power design methodologies.