CAD Design Methodology Engineer — Low-Power & SoC Flows

Saige Partners; Town of Texas (WI); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Weekly payment solutions

Benefits package

Job summary

Saige Partners seeks a seasoned CAD Engineering & Design Methodology Engineer to develop and execute technical roadmaps for next‑generation design tools, flows, and methodologies. Focus areas include power‑efficient GPU, CPU, and SoC designs across advanced nodes, with expertise in CAD engineering, design methodology, and low‑power design.

The role requires hands‑on experience with RTL/GPU/SoC flows, EMIR analysis, and collaboration with RTL, verification, physical design, and DTCO teams.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering with 6 years of relevant experience.
• 6 years of hands‑on experience in CAD engineering, design methodology, or design enablement supporting GPU, CPU, or complex SoC programs.
• Strong working knowledge of low‑power design tools and methodologies, including RTL‑ and gate‑level power analysis, optimization, and signoff.
• Experience with tools such as PrimePower, PowerArtist, Empower, Joules, RTL-Architect.
• Strong understanding of the end‑to‑end ASIC design flow, including RTL design and verification, synthesis, physical design, timing analysis, power analysis and optimization, EMIR analysis, and DTCO considerations.
• Hands‑on experience with CAD/EDA tools supporting simulation, synthesis, linting, and verification.
• Experience with major EDA platforms, such as Synopsys, Cadence, or Siemens EDA/Mentor Graphics.
• Hands‑on experience with EMIR analysis tools and methodologies, including transistor‑, gate‑, and package‑level analysis.
• Experience with tools such as RedHawk, Totem, Voltus.

Responsibilities

• Develop and execute technical roadmaps for CAD engineering, design enablement, and methodology improvements.
• Contribute to the development of next-generation tools, design flows, and methodologies for advanced GPU, CPU, and SoC designs.
• Develop robust automation solutions and troubleshoot complex CAD tools, design flows, and methodology issues.
• Promote consistent adoption of design best practices across engineering organizations.
• Support low-power design enablement at scale, including methodologies for power analysis, optimization, verification, and signoff.
• Collaborate with RTL, verification, physical design, and DTCO teams.
• Partner with internal engineering organizations and external EDA vendors to leverage tool capabilities and improve readiness.
• Lead and contribute to moderate-to-complex technical projects from definition through implementation.
• Identify opportunities to improve design productivity, quality, scalability, and efficiency.
• Develop and maintain technical documentation, methodologies, and best practices.
• Stay current with emerging GPU, ASIC, verification, power, and semiconductor design technologies.

Skills

CAD engineering

Design methodology

Low-power design

ASIC flows

EDA tools

RTL power analysis

Power optimization

Power signoff

DTCO

EMIR analysis

Synthesis

Verification

Synopsys

Cadence

Siemens EDA

RedHawk

Totem

Voltus

Education

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering

Master's degree with 4 years of relevant experience

Ph.D. with 2 years of relevant experience

Tools

PrimePower

PowerArtist

Empower

Joules

RTL-Architect

Synopsys

Cadence

Siemens EDA

RedHawk

Totem

Voltus

Job description

Saige Partners seeks a seasoned CAD Engineering & Design Methodology Engineer to develop and execute technical roadmaps for next‑generation design tools, flows, and methodologies. Focus areas include power‑efficient GPU, CPU, and SoC designs across advanced nodes, with expertise in CAD engineering, design methodology, and low‑power design.

The role requires hands‑on experience with RTL/GPU/SoC flows, EMIR analysis, and collaboration with RTL, verification, physical design, and DTCO teams.