Senior Avionics FPGA Engineer for Lunar Systems

Blue Origin LLC; Seattle (WA); On-site; USD 119,814 - 182,987; Full time

Benefits offered by this job

401(k) with company match

Stock options

Paid time off

Parental leave

Education support program

Job summary

Blue Origin LLC is seeking a seasoned FPGA Engineer III for the Lunar Permanence program in the Greater Seattle area. You will develop FPGA firmware, verify designs, and create tests while coordinating with systems, hardware, and software teams to ensure reliability in harsh spaceflight environments.

Travel up to 10% may be required. Qualifications include a bachelor’s or master’s in engineering, 5+ years in FPGA/ASIC, and proficiency with Verilog/SystemVerilog, VHDL, and HDL-based verification

Qualifications

• Bachelor’s/Master’s degree in computer engineering, electrical engineering, computer science, mathematics, physics, aerospace, or related fields.
• 5+ years FPGA/ASIC design & verification experience.
• Proficient RTL writing in Verilog/SystemVerilog/VHDL.
• Strong FPGA concepts: CDC, constraints, timing closure.
• Proficient with tools: Xilinx Vivado/Intel Quartus/Lattice Diamond/Libero; ModelSim/QuestaSim; UVM/OVM.

Responsibilities

• Develop firmware requirements with systems/hardware/software teams.
• Design and verify FPGA firmware using HDL and testbenches.
• Develop tests and documentation; participate in design reviews.
• Collaborate with NASA and partners on the HLS/Lunar Permanence program.

Skills

Verilog/SystemVerilog

VHDL

FPGA/ASIC design

RTL coding

CDC & timing

Education

Bachelor's/Master’s in engineering/science

Tools

Xilinx Vivado

Intel Quartus

Lattice Diamond/Radiant

ModelSim/QuestaSim

UVM/OVM

Job description

Blue Origin LLC is seeking a seasoned FPGA Engineer III for the Lunar Permanence program in the Greater Seattle area. You will develop FPGA firmware, verify designs, and create tests while coordinating with systems, hardware, and software teams to ensure reliability in harsh spaceflight environments.

Travel up to 10% may be required. Qualifications include a bachelor’s or master’s in engineering, 5+ years in FPGA/ASIC, and proficiency with Verilog/SystemVerilog, VHDL, and HDL-based verification