Senior ASIC Verification Engineer | SystemVerilog/UVM Lead

LitePoint; North Reading (MA); On-site; USD 155,000 - 308,000; Full time

Job summary

Teradyne seeks a Sr. ASIC Verification Engineer based in North Reading, MA to join the ASIC Reference Model team. You will lead verification planning, develop SystemVerilog/UVM environments, and work with design, firmware, software, and validation for comprehensive coverage.

Requirements include 8+ years in ASIC/SoC verification, SystemC/C++, Python/Perl scripting, OOP, and experience with EDA tools. Salary ranges from $154,900 to $307,600 with discretionary bonuses.

Qualifications

• Bachelor's or higher in Electrical Engineering or related field; Master's preferred.
• 8+ years of ASIC/SoC verification experience in semiconductor product development.
• Strong experience with SystemVerilog/UVM and SystemC/C++.
• Proficiency in Python/Perl scripting and object-oriented programming.

Responsibilities

• Lead verification planning, testbench architecture, and execution for complex ASIC/SoC designs.
• Develop and maintain SystemVerilog/UVM-based verification environments, test cases, and reusable components.
• Collaborate with design, architecture, firmware, software, and validation teams to ensure coverage.
• Build verification strategies using simulation, coverage-driven verification, assertions, and formal methodologies.
• Support debug and root-cause analysis of issues identified during verification and silicon bring-up.
• Mentor junior engineers on verification methodologies, coding practices, and debugging techniques.
• Ensure verification deliverables are high quality, on schedule, and aligned with project objectives.

Skills

SystemVerilog

UVM

SystemC

C++

Education

Bachelor's degree in Electrical Engineering

Tools

EDA tools

Job description

Teradyne seeks a Sr. ASIC Verification Engineer based in North Reading, MA to join the ASIC Reference Model team. You will lead verification planning, develop SystemVerilog/UVM environments, and work with design, firmware, software, and validation for comprehensive coverage.

Requirements include 8+ years in ASIC/SoC verification, SystemC/C++, Python/Perl scripting, OOP, and experience with EDA tools. Salary ranges from $154,900 to $307,600 with discretionary bonuses.