Senior ASIC Verification Engineer - RTL/UVM, C/C++, RSUs

Amazon Inc.; Sunnyvale (CA); On-site; USD 213,000 - 288,000; Full time

Job summary

Amazon Inc. is seeking a senior verification engineer for Amazon Leo’s SOCs, focusing on satellite communications.

You will implement a state-of-the-art verification environment, define test plans, and write tests in C/C++ for embedded CPU, FPGA, and emulation platforms. You will collaborate with design and system teams on system-level verification, run formal verification for complex blocks, and contribute to automated regression workflows using UVM, SystemC, and DPI-C.

Qualifications

• Bachelors degree in CS/CE/EE.
• 7+ years in verification, preferably in communication systems.
• 5+ years in UVM, C/C++ and scripting.

Responsibilities

• Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models.
• Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program.
• Write tests in C/C++ to execute on embedded CPU.
• Develop tests for FPGA and emulation platforms.
• Run formal verification of complex blocks to ensure functional correctness.
• Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, System C and DPI-C.
• Develop a highly automated environment to run regressions that can be used to make builds and maintain organization of the database.

Skills

UVM

C/C++

Scripting

Education

Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering

Tools

Matlab

Job description

Amazon Inc. is seeking a senior verification engineer for Amazon Leo’s SOCs, focusing on satellite communications.

You will implement a state-of-the-art verification environment, define test plans, and write tests in C/C++ for embedded CPU, FPGA, and emulation platforms. You will collaborate with design and system teams on system-level verification, run formal verification for complex blocks, and contribute to automated regression workflows using UVM, SystemC, and DPI-C.