Senior ASIC Verification Engineer - Lead UVM & SoC

Blue Origin; Texas; Hybrid; USD 230,000 - 323,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

Parental leave

Disability insurance

401(k) match

Education support

Stock options

Paid time off

Job summary

Blue Origin in Texas is seeking an experienced ASIC/SoC verification engineer to lead verification planning, develop UVM environments, and drive coverage closure. You will translate architecture into verification strategies and mentor junior engineers.

Collaborate with design, firmware, and systems teams, review testbench quality, support bring-up and post‑silicon debugging, and contribute to a high‑assurance space hardware pipeline.

Qualifications

• BS or MS in Electrical/Computer Engineering, Computer Engineering, or related field.
• 8+ years ASIC/SoC verification experience.
• Deep hands-on SystemVerilog and UVM expertise.
• Strong verification planning, assertions, and coverage closure.
• Experience verifying complex digital control and datapath logic.
• Proven debugging capability across RTL, testbench, and system interactions.
• Ability to work effectively across multidisciplinary engineering teams.

Responsibilities

• Lead verification planning and execution for complex blocks or subsystems.
• Develop sophisticated UVM environments, reference models, scoreboards, protocol monitors, and assertions.
• Translate architecture and design specifications into comprehensive verification strategies and measurable coverage goals.
• Drive functional coverage closure, regression health, and verification signoff readiness.
• Identify verification gaps, corner cases, and high‑risk scenarios early in the development cycle.
• Collaborate closely with design, systems, DFT, firmware, and physical design teams.
• Review testbench architecture, stimulus quality, and debug methodologies for technical excellence.
• Mentor junior engineers in verification standard processes.
• Support bring‑up, emulation, prototyping, and post‑silicon debug activities as needed.

Skills

SystemVerilog

UVM

ASIC/SoC verification

Verification planning

Debug RTL/testbench

Education

B.S./M.S. in Electrical/Computer Engineering

Tools

Formal verification tools

Job description

Blue Origin in Texas is seeking an experienced ASIC/SoC verification engineer to lead verification planning, develop UVM environments, and drive coverage closure. You will translate architecture into verification strategies and mentor junior engineers.

Collaborate with design, firmware, and systems teams, review testbench quality, support bring-up and post‑silicon debugging, and contribute to a high‑assurance space hardware pipeline.