Principal ASIC Verification Engineer — Space-Grade SoC Lead

Blue Origin LLC; Town of Texas (WI); On-site; USD 269,000 - 377,000; Full time

Benefits offered by this job

Medical, dental, vision

Paid parental leave

Short and long-term disability

401(k) with company match up to 5%

Educational Support Program

Stock Options for regular employees

Job summary

Blue Origin LLC in the United States is seeking a Principal ASIC Verification Engineer to lead verification strategy for high‑performance satellite communication ASICs/SoCs. You will drive coverage, formal analysis, and sign-off criteria across blocks and systems, partnered with design, architecture, firmware, and validation teams.

The role requires 12+ years in ASIC/SoC verification, expert SystemVerilog/UVM, and a proven track record leading complex tape-outs.

Qualifications

• BS/MS/PhD in Electrical Engineering, Computer Engineering, or related field.
• 12+ years of ASIC/SoC verification experience.
• Expert-level knowledge of SystemVerilog, UVM, assertions, and verification signoff methodology.
• Proven success leading verification for complex chips or multiple tape-outs.

Responsibilities

• Define end-to-end verification strategy for large Satellite communication ASIC/SoC programs.
• Establish verification methodologies, infrastructure, and signoff criteria across levels.
• Lead verification planning for modem pipelines, FEC engines, and digital beamforming.
• Drive alignment among design, architecture, systems, firmware, and validation teams.
• Evaluate verification completeness through coverage, assertions, formal analysis, emulation.
• Mentor technical leaders and raise verification maturity of the organization.

Skills

SystemVerilog

UVM

Assertions

Verification signoff

Cross‑functional leadership

Education

BS/MS/PhD in Electrical Engineering or related field

Tools

Formal verification tools

Emulation

Silicon correlation

Job description

Blue Origin LLC in the United States is seeking a Principal ASIC Verification Engineer to lead verification strategy for high‑performance satellite communication ASICs/SoCs. You will drive coverage, formal analysis, and sign-off criteria across blocks and systems, partnered with design, architecture, firmware, and validation teams.

The role requires 12+ years in ASIC/SoC verification, expert SystemVerilog/UVM, and a proven track record leading complex tape-outs.