Space-Comm ASIC Verification Lead

Blue Origin; Cupertino (CA); On-site; USD 269,000 - 377,000; Full time

Benefits offered by this job

Stock Options

401(k) with company match

Paid Time Off

Parental leave

Education Support Program

Job summary

Blue Origin in California is seeking a Principal ASIC Verification Engineer to set verification strategy for high-performance satellite communication chips. You will lead verification planning across block, subsystem, and SoC levels, and collaborate with design, architecture, systems, firmware, and validation teams to deliver robust verification results.

The role requires 12+ years in ASIC/SoC verification, expert SystemVerilog and UVM knowledge, and proven success in tape-outs.

Qualifications

• 12+ years of ASIC/SoC verification experience.
• Expert-level knowledge of System Verilog, UVM, assertions, and verification signoff methodology.
• Proven success leading verification for complex chips or multiple tape-outs.

Responsibilities

• Define end-to-end verification strategy for large Satellite communication ASIC or SoC programs.
• Establish verification methodologies, infrastructure, and signoff criteria across block, subsystem, and SoC levels.
• Lead verification planning for complex communication functions such as modem pipelines, FEC engines, digital beamforming, packet processing, and control fabrics.
• Drive alignment among design, architecture, systems, firmware, and validation teams.
• Evaluate verification completeness through coverage, assertions, formal analysis, emulation, and silicon correlation.
• Resolve critical technical issues and direct root-cause analysis for the most complex functional failures.
• Guide development of reusable VIP, reference models, and regression automation frameworks.
• Mentor technical leaders and raise the overall verification maturity of the organization.

Skills

SystemVerilog

UVM

Assertions

Verification signoff

Education

BS/MS/PhD in Electrical Engineering or Computer Engineering

Job description

Blue Origin in California is seeking a Principal ASIC Verification Engineer to set verification strategy for high-performance satellite communication chips. You will lead verification planning across block, subsystem, and SoC levels, and collaborate with design, architecture, systems, firmware, and validation teams to deliver robust verification results.

The role requires 12+ years in ASIC/SoC verification, expert SystemVerilog and UVM knowledge, and proven success in tape-outs.