Senior ASIC Verification Engineer for SoC/CPU-GPU

Managed Staffing, Inc.; San Jose (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Managed Staffing, Inc. is seeking a senior verification engineer in the San Jose area to support a complex ASIC/SoC project.

You will participate in functional verification of blocks and IP cores within CPU/GPU development, and document test plans for directed and constrained-random simulations. The role requires extensive C/C++ experience under Linux, knowledge of Verilog/SystemVerilog/SystemC, and strong debugging skills with tools like Gdb and Valgrind.

Qualifications

• 8-10 years of verification experience on large ASIC projects or hardware-related software/firmware experience.
• Strong background in C/C++ development in Linux environments.
• Good debugging skills with Gdb and Valgrind.
• Proficient in object-oriented programming and data structures; knowledge of STL.
• Experience with Verilog/SystemVerilog/SystemC; DPI/PLI is a plus.
• Strong analytical skills and attention to detail; excellent written and verbal communication.
• Prefer experience with SoC verification and UVM (SystemVerilog).
• Manager open to candidates around 5 years with rate adjusted to experience.

Responsibilities

• Participate in functional verification of ASIC blocks and IP cores for CPU/GPU development.
• Collaborate with design and verification teams to understand and verify design elements.
• Document and execute test plans with directed and constrained-random tests in simulation.
• Adopt evolving industry verification methodologies within existing infrastructure.
• Be familiar with hardware modeling and/or assertion-based verification methods.

Skills

C/C++ development

Linux environment

Debug tools

Object Oriented programming

Verilog/SystemVerilog/SystemC

DPI/PLI in C

Perl

Makefiles

UVM (SystemVerilog)

Tools

Gdb

Valgrind

Perl tooling

Makefiles

Job description

Managed Staffing, Inc. is seeking a senior verification engineer in the San Jose area to support a complex ASIC/SoC project.

You will participate in functional verification of blocks and IP cores within CPU/GPU development, and document test plans for directed and constrained-random simulations. The role requires extensive C/C++ experience under Linux, knowledge of Verilog/SystemVerilog/SystemC, and strong debugging skills with tools like Gdb and Valgrind.