An application made for this job — a tailored resume and cover letter that speak straight to the posting.
NVIDIA Corporation in Massachusetts is seeking Senior ASIC Timing Design Engineers to join the Networking Silicon team. You will drive timing for high‑frequency DPUs and SoCs, from RTL to GDS2, including synthesis, ECOs, floorplanning, and timing convergence.
You will collaborate on frontend/backend flows, optimize constraints, and ensure power, performance, and area targets. Base salary ranges will reflect location and experience; equity and benefits are provided.
NVIDIA Corporation in Massachusetts is seeking Senior ASIC Timing Design Engineers to join the Networking Silicon team. You will drive timing for high‑frequency DPUs and SoCs, from RTL to GDS2, including synthesis, ECOs, floorplanning, and timing convergence.
You will collaborate on frontend/backend flows, optimize constraints, and ensure power, performance, and area targets. Base salary ranges will reflect location and experience; equity and benefits are provided.