Senior ASIC Reliability & Hardware Validation Architect

Jobtailor; San Jose (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Jobtailor in San Jose, CA is seeking a senior reliability and hardware design leader for next-generation semiconductor and networking products. You will define and drive qualification plans, lead HTOL, Burn-In, and stress testing, and manage cross-functional teams across design, test, and manufacturing.

The role requires 10+ years in reliability or high-speed hardware design, with deep knowledge of JEDEC/AEC/Telcordia standards.

Qualifications

• Master’s degree in electrical or computer engineering.
• 10+ years of professional experience in semiconductor reliability and/or high-speed hardware design.
• Proven experience in developing high-power HTOL/Burn-In testing for advanced node products.
• Deep knowledge of JEDEC, AEC, and Telcordia standards.
• Hands-on experience with high-speed network interfaces and board design.
• Familiarity with Cadence Allegro.
• Experience with high-speed measurement equipment and automated test development.
• Ability to interpret sophisticated schematics and layouts.
• PhD in Electrical or Computer Engineering (preferred).
• Experience with 2nm/3nm Hyperscaler Multi-Chip-Modules and advanced packaging (preferred).

Responsibilities

• Lead the reliability and hardware design validation for next-generation semiconductor and networking products.
• Bridge the gap between advanced semiconductor reliability testing and high-speed hardware board design.
• Define and execute comprehensive product/process qualification plans for high-power solutions (wafer/package level).
• Drive robust, error-free HTOL, Burn-In, and stress testing (HAST, TC, HTS, ESD, LU, SER).
• Manage reliability suppliers and subcontractors to ensure adherence to qualification schedules.
• Lead hardware design, schematic generation, and design validation for service provider routing products.
• Manage board bring-up and debug processes.
• Drive failure analysis activities and generate detailed qualification reports.
• Partner with eCAD, FPGA, Power, Mechanical, Signal Integrity, and Manufacturing teams.
• Provide technical documentation and support for customer quality and reliability requirements.

Skills

Semiconductor reliability

High-speed hardware design

HTOL/Burn-In testing

Data analysis

Signal integrity

Schematic generation

Education

Master’s degree in Electrical or Computer Engineering

PhD in Electrical or Computer Engineering (preferred)

Tools

Cadence Allegro

High-Speed Measurement Equipment

JMP

Reliasoft

Minitab

Python

Perl

TCL

Verilog

Job description

Jobtailor in San Jose, CA is seeking a senior reliability and hardware design leader for next-generation semiconductor and networking products. You will define and drive qualification plans, lead HTOL, Burn-In, and stress testing, and manage cross-functional teams across design, test, and manufacturing.

The role requires 10+ years in reliability or high-speed hardware design, with deep knowledge of JEDEC/AEC/Telcordia standards.