Senior ASIC Front-End Design Lead

Apple

Sunnyvale (CA)

On-site

USD 250,000 - 360,000

Full time

7 days ago
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Job summary

Apple is seeking a high-impact leader to head a team of engineers at the center of SOC IP DMA design. You will balance people management and technical leadership, guiding microarchitecture, RTL delivery, and debugging to silicon-ready quality.

Your team contributes to products used by millions worldwide. You will partner with architecture, IP integration, chip integration, and verification teams, driving innovation through tools and automation while fostering a growth mindset throughout the

Qualifications

  • BS in Electrical Engineering or related field with 20+ years of relevant industry experience.
  • Extensive hands-on front-end ASIC design experience.
  • Proven technical leadership with multi-person deliverables and cross-functional interfacing.

Responsibilities

  • Lead a team of engineers in front-end ASIC design, microarchitecture, RTL, and debug.
  • Define and document micro-architecture; guide technical decisions and review work.
  • Drive design infrastructure, automation, and use of AI and emerging tools.
  • Manage schedules, scope, effort estimates, and resource planning with cross-functional partners.
  • Mentor and grow team culture focused on collaboration, quality, and continuous learning.

Skills

Front-end ASIC design
Technical leadership
Mentoring / people management
Cross-functional collaboration
Project planning & scheduling

Education

BS in Electrical Engineering or related

Job description

Apple is seeking a high-impact leader to head a team of engineers at the center of SOC IP DMA design. You will balance people management and technical leadership, guiding microarchitecture, RTL delivery, and debugging to silicon-ready quality.

Your team contributes to products used by millions worldwide. You will partner with architecture, IP integration, chip integration, and verification teams, driving innovation through tools and automation while fostering a growth mindset throughout the

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