Senior ASIC Floorplan Architect for AI & GPUs

Anysilicon

Austin (TX)

Hybrid

USD 180,000 - 240,000

Full time

4 days ago
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Job summary

NVIDIA is seeking an experienced ASIC Floorplan Engineer in Austin, TX to design and implement cutting-edge SOCs, CPUs, and GPUs. You will collaborate with cross-functional teams to optimize floorplans, ensuring optimal cost, area, performance, and power across product lines.

The ideal candidate has 10+ years in SOC/sub-system development, with strong expertise in physical design, power/clock distribution, DFT, and packaging, plus programming skills in Python, Perl, or C++.

Qualifications

  • MSEE/MSCE or equivalent experience in chip development.
  • 10+ years of experience in SOC, CPU, graphics, memory, and I/O sub-systems development.
  • Experience with physical design methodologies, chip floorplan, power/clock/reset distribution, DFT, place and route, timing closure, and packaging.

Responsibilities

  • Collaborate with multi-disciplinary teams to optimize chip floorplans for cost, area, performance, and power.
  • Drive floorplan development and work with ASIC and Physical design teams to identify and resolve technical issues.
  • Develop AI workflows and productivity tools to enhance chip area optimization and execution speed.
  • Identify technical and product risks, collaborating with engineering and management to implement mitigation strategies.

Skills

Python
Perl
C++
Communication skills

Education

MSEE/MSCE or equivalent

Tools

Physical design methodologies
Chip floorplan
Power/clock/reset distribution
DFT
Place and route
Timing closure
Packaging

Job description

NVIDIA is seeking an experienced ASIC Floorplan Engineer in Austin, TX to design and implement cutting-edge SOCs, CPUs, and GPUs. You will collaborate with cross-functional teams to optimize floorplans, ensuring optimal cost, area, performance, and power across product lines.

The ideal candidate has 10+ years in SOC/sub-system development, with strong expertise in physical design, power/clock distribution, DFT, and packaging, plus programming skills in Python, Perl, or C++.

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