Senior ASIC Design Engineer – Optical & AI Hardware

Celero Communications; Irvine (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Celero Communications is a fast-growing semiconductor startup that designs innovative AI and data center hardware. This role focuses on high-performance digital circuit and ASIC development using Verilog and SystemVerilog, with emphasis on DSP, SerDes, and mixed-signal integration.

You will collaborate across multiple engineering teams to bring architectures from RTL to silicon. The ideal candidate has 5+ years in digital ASIC design, strong Verilog/SystemVerilog skills, and experience with

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• 5+ years of experience in digital ASIC design with ownership of complex blocks or subsystems.
• Strong proficiency in Verilog and SystemVerilog; solid RTL design fundamentals.

Responsibilities

• Design and implement high-performance digital circuits and ASIC blocks using Verilog and SystemVerilog.
• Develop and integrate DSP, digital communication, and high-speed SerDes functionality into ASIC designs.
• Work with Analog, SerDes, DSP, Architecture, Verification, Physical Design, and Systems teams on mixed-signal ASICs.

Skills

Verilog

SystemVerilog

RTL design

DSP

High-speed SerDes

Digital communications

Education

Bachelor’s or higher in Electrical/Computer Engineering

Tools

EDA tools

Job description

Celero Communications is a fast-growing semiconductor startup that designs innovative AI and data center hardware. This role focuses on high-performance digital circuit and ASIC development using Verilog and SystemVerilog, with emphasis on DSP, SerDes, and mixed-signal integration.

You will collaborate across multiple engineering teams to bring architectures from RTL to silicon. The ideal candidate has 5+ years in digital ASIC design, strong Verilog/SystemVerilog skills, and experience with