Senior Analog/RF Mixed-Signal Verification Engineer

Apple Inc.; Sunnyvale (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Apple Inc. in Sunnyvale, CA seeks a Design Verification Engineer to own RNM/RF analog modeling and verification within a large SoC, partnering with analog designers to AMS simulation environments and digital-on-top testbenches.

The role requires a BS with 10+ years of experience in analog/RF theory, strong SystemVerilog skills, and experience with Cadence mixed-signal verification. MSc and additional years are preferred; candidate should read schematics and extract main functionality from analog

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Strong fundamentals in analog/RF circuit theory/topologies.

Responsibilities

• Development of RNM RF/Analog models in SystemVerilog.
• Develop models with self-checking techniques.
• Assess required model accuracy level depending on verification goals.
• Develop appropriate assertions to ensure analog/digital specs are respected and provide digital verification passing criteria.
• Work with Analog designers setting up AMS simulation environment.
• Debug complex chip digital-on-top testbenches and seek root causes for failures.

Skills

RF/Analog modeling

SystemVerilog

AMS verification

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree (MSc) in a related field

Tools

Cadence mixed signal verification

Job description

Apple Inc. in Sunnyvale, CA seeks a Design Verification Engineer to own RNM/RF analog modeling and verification within a large SoC, partnering with analog designers to AMS simulation environments and digital-on-top testbenches.

The role requires a BS with 10+ years of experience in analog/RF theory, strong SystemVerilog skills, and experience with Cadence mixed-signal verification. MSc and additional years are preferred; candidate should read schematics and extract main functionality from analog