Mixed Signal Verification Engineer

Apple Inc.; Sunnyvale (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Apple Inc. in Sunnyvale, CA seeks a Design Verification Engineer to own RNM/RF analog modeling and verification within a large SoC, partnering with analog designers to AMS simulation environments and digital-on-top testbenches.

The role requires a BS with 10+ years of experience in analog/RF theory, strong SystemVerilog skills, and experience with Cadence mixed-signal verification. MSc and additional years are preferred; candidate should read schematics and extract main functionality from analog

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Strong fundamentals in analog/RF circuit theory/topologies.

Responsibilities

• Development of RNM RF/Analog models in SystemVerilog.
• Develop models with self-checking techniques.
• Assess required model accuracy level depending on verification goals.
• Develop appropriate assertions to ensure analog/digital specs are respected and provide digital verification passing criteria.
• Work with Analog designers setting up AMS simulation environment.
• Debug complex chip digital-on-top testbenches and seek root causes for failures.

Skills

RF/Analog modeling

SystemVerilog

AMS verification

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree (MSc) in a related field

Tools

Cadence mixed signal verification

Job description

Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology organization, and we'd love to have you join us.You will own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks (regulators, bandgaps, data converters, LNA/PA, mixers, PLLs) inside a large SoC, including self-checking models, assertions for analog/digital specs, and AMS environment setup with analog designers

Description

In this role, you will own the modeling and verification of advanced analog/RF blocks residing within a large SoC.

Responsibilities

• Development of RNM RF/Analog models in SystemVerilog.
• Develop models with self-checking techniques.
• Assess required model accuracy level depending on verification goals.
• Develop appropriate assertions to ensure analog/digital specs are respected and provide digital verification passing criteria.
• Work with Analog designers setting up AMS simulation environment.
• Debug complex chip digital-on-top testbenches and seek root causes for failures.

Minimum Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Strong fundamentals in analog/RF circuit theory/topologies.

Preferred Qualifications

• MSc and 7 years of relevant industry experience.
• Experience working with Cadence mixed signal verification environment.
• Ability to read analog schematics and extract related main functionality.
• Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp's, OTA's, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc…
• Experience modeling high frequency PLL's is desired.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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Apple accepts applications to this posting on an ongoing basis.