Senior Analog Mixed Signal Verification Engineer

Insight Global; Chandler (AZ); On-site; USD 120,000 - 190,000; Full time

Job summary

Insight Global is seeking a senior analog/mixed-signal verification engineer in Chandler, AZ to lead verification for automotive and industrial PMICs from specification through signoff.

Responsibilities include defining verification strategies, environments, regressions, and coverage objectives, developing reusable AMS verification components, and driving test planning, constrained-random verification, and signoff processes with cross-functional teams.

Qualifications

• M.S. in Electrical Engineering, Computer Engineering, or a related field required.
• Minimum 10 years of experience in analog and mixed-signal IC verification and development.
• Strong understanding of analog and mixed-signal fundamentals including PMICs, DC-DC converters, LDOs, ADCs, DACs, PLLs, bandgaps, and sensor interfaces.
• Expertise in AMS verification using Verilog-AMS, SystemVerilog, UVM, assertions, mixed-signal simulation, and RNM.
• Experience developing behavioral models and reusable verification environments for complex mixed-signal designs.
• Strong knowledge of coverage-driven verification, constrained-random verification, regression automation, and verification signoff processes.
• Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA. Experience with formal verification, low-power verification, and requirements traceability methodologies is highly desirable.

Responsibilities

• Lead analog and mixed-signal verification for automotive and industrial PMICs from spec through signoff.
• Define verification strategies, environments, regressions, and coverage objectives.
• Develop and validate mixed-signal simulation environments, checkers, assertions, scoreboards, and reusable verification components.
• Drive verification execution through test planning, constrained-random verification, mixed-signal simulation, coverage analysis, regression management, debug, and signoff.
• Bridge digital and mixed-signal verification flows for robust block, subsystem, and top-level verification.
• Collaborate with cross-functional teams to ensure product quality, reliability, safety, and robustness.

Skills

AMS verification

Verilog-AMS

SystemVerilog

UVM

RNM

Constrained-random

Coverage-driven

Leadership

Regression automation

Education

M.S. in Electrical or Computer Engineering

Tools

Cadence

Synopsys

Siemens EDA

Job description

Job Description

This role will lead analog and mixed-signal verification for automotive and industrial PMIC products from specification through verification signoff. It will also define verification strategies, environments, regressions, and coverage objectives for complex mixed-signal IPs, subsystems, and SoCs. Collaborate with cross-functional teams to ensure product quality, reliability, functional correctness, safety, and robustness.

Review product requirements, architecture specifications, design documentation, programming models, interfaces, and implementation plans for automotive and industrial PMIC applications.

Define and execute AMS verification strategies aligned with system, performance, quality, reliability, safety, power, and functional requirements.

Lead AMS verification activities, including verification plans, methodologies, environments, regressions, documentation, schedules, coverage objectives, and milestone tracking.

Develop and validate mixed-signal simulation environments, behavioral models, checkers, assertions, scoreboards, and reusable verification components using Verilog-AMS, SystemVerilog, UVM, and RNM.

Drive verification execution through test planning, constrained-random verification, mixed-signal simulation, coverage analysis, regression management, debug, and signoff.

Bridge digital and mixed-signal verification flows for robust block, subsystem, and top-level verification.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to [e-mail] learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/.

Skills and Requirements

M.S. in Electrical Engineering, Computer Engineering, or a related field required.

Minimum 10 years of experience in analog and mixed-signal IC verification and development, including technical leadership responsibilities.

Strong understanding of analog and mixed-signal circuit fundamentals, including PMICs, DC-DC converters, LDOs, ADCs, DACs, PLLs, voltage references, bandgaps, and sensor interfaces.

Expertise in AMS verification using Verilog-AMS, SystemVerilog, UVM, assertions, mixed-signal simulation, and Real Number Modeling (RNM).

Experience developing behavioral models and reusable verification environments for complex mixed-signal designs.

Strong knowledge of coverage-driven verification, constrained-random verification, regression automation, and verification signoff processes.

Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA. Experience with formal verification, low-power verification, and requirements traceability methodologies is highly desirable.