Senior Analog/Mixed Signal Design Engineer

Aeonsemi

Santa Clara (CA)

On-site

USD 120,000 - 200,000

Full time

15 hours ago
Be an early applicant
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Benefits offered by this job

Equity award
Medical, dental, and vision benefits
401k Plan and matching
Paid parental leave
Flexible PTO

Job summary

Aeonsemi, founded to tackle advanced analog/mixed-signal challenges, is seeking talented engineers to develop cutting-edge high-speed communication and timing ICs. You must have a proven record in designing complex ICs in state-of-the-art CMOS processes and ship products into volume production.

Responsibilities include architecting and verifying circuits, supervising layout, and supporting product definitions, test programs, and lab characterization. Santa Clara or Portland options.

Qualifications

  • MS/PhD in Electrical Engineering with at least 2 years of experience.
  • Strong fundamentals in circuit theory, signal processing, and physical design.
  • Experience designing ADCs, DACs, PLLs, and high-speed I/O.
  • Ability to work in a team and communicate effectively.
  • Python or similar programming experience preferred.

Responsibilities

  • Architect, design, and verify circuits to meet product requirements.
  • Supervise layout designer and perform hands-on layout of critical circuits when needed.
  • Support product definition, test program development, and lab characterization.

Skills

Team collaboration
Communication skills
Python or programming

Education

MS/PhD in Electrical Engineering

Tools

Python

Job description

Founded in October 2018 by technology leaders in mixed signal, DSP, and systems design, Aeonsemi solves complex technical challenges in networking, computing, wireless infrastructure, industrial, and automotive applications with industry leading IC solutions.

Position:

We are looking for talented analog/mixed-signal design engineers to develop cutting edge high-speed communication and timing ICs. The candidate must have a proven record of designing complex ICs in state-of-the-art CMOS process technologies and successfully taken products into volume production.

Responsibilities:
  • Architects, designs, and verifies circuits to meet product requirements
  • Supervise layout designer, hands-on layout of critical circuits when neededSupport product definition, test program development, and lab characterization
Requirements:
  • M.S. or Ph.D. in Electrical Engineering with minimum 2 years of experience
  • Strong fundamentals in circuit theory, signal processing, and physical design
  • Advanced understanding of device noise, mismatch, linearity, and other impairments
  • Experience designing three or more of the following: ADCs, DACs, Filters, PLLs, DLLs, High-speed I/O, Clock and Data Recovery
  • Works well within a team
  • Excellent written and verbal communication skills
  • Python or other programming language preferred
Company Perks & Benefits:
  • Competitive salary with annual base pay range $120k ~ $200k
  • Equity award at a rapid growth startup company
  • Medical, dental, and vision benefits
  • 401k Plan and matching
  • Paid parental leave
  • Flexible paid time off

Location can be either:

Santa Clara, California, or Portland, OR

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Mixed Signal Design Engineer
Mixed Signal Design Engineer

Aeonsemi • San Francisco (CA)

On-site
USD 120,000 - 190,000
Great team work environment
Competitive benefits including health,
Senior Analog/Mixed-Signal IC Engineer – High-Speed
Senior Analog/Mixed-Signal IC Engineer – High-Speed

Aeonsemi • Santa Clara (CA)

On-site
USD 120,000 - 200,000
Equity award
Medical, dental, and vision benefits
401k Plan and matching
+2
High-Speed Mixed-Signal Design Engineer
High-Speed Mixed-Signal Design Engineer

Aeonsemi • San Francisco (CA)

On-site
USD 120,000 - 190,000
Great team work environment
Competitive benefits including health,
Sr. Analog Mixed-Signal Design Engineer
Sr. Analog Mixed-Signal Design Engineer

Cypress HCM • San Jose (CA)

On-site
USD 115,000 - 208,000
Medical insurance
Vision insurance
401(k)
Analog Design Engineer
Analog Design Engineer

IC Enable • Town of Texas (WI)

Hybrid
USD 110,000 - 160,000
Medical benefits
Dental benefits
Vision benefits
+2
Senior Analog Design Engineer
Senior Analog Design Engineer

Triveni IT • Santa Clara (CA)

On-site
USD 180,000 - 280,000
Equity opportunities
Analog IC Design Engineer
Analog IC Design Engineer

Anysilicon • Tempe (AZ), Northern (KY)

Hybrid
USD 140,000 - 170,000
Analog IC Design Engineer
Analog IC Design Engineer

Zenovo • Boston (MA)

On-site
USD 150,000 - 210,000
Senior Technical Staff Engineer – IC Analog Design
Senior Technical Staff Engineer – IC Analog Design

Microchip Technology Inc. • Chandler (AZ)

On-site
USD 120,000 - 160,000
Mixed-Signal CMOS IC Design Engineer
Mixed-Signal CMOS IC Design Engineer

AttoTude • Menlo Park (CA)

On-site
USD 160,000 - 250,000
Stock options plan
Health benefits
Flex time off