Mixed Signal Design Engineer

Aeonsemi; San Francisco (CA); On-site; USD 120,000 - 190,000; Full time

Benefits offered by this job

Great team work environment

Competitive benefits including health,

Job summary

Aeonsemi, a pre-IPO chip design company, is seeking an Analog/mixed-signal Design Engineer in San Francisco. You will design high-performance RF/analog/mixed-signal circuits for high-speed wireline transceiver products using advanced CMOS technologies.

Join a team focused on secure data connectivity and robust timing synchronization, with opportunities to grow across full-stack design, simulation, and production test flows. A strong background in analog fundamentals and a PhD/MS is desirable.

Qualifications

• MS or PhD in electrical engineering with minimum 2 years of experience.
• Knowledge of analog fundamentals: biasing circuits, clock generation and/or data converters.
• Proficient in Python or other programming language.
• Interest in developing full-stack skills spanning mixed-signal design, simulation and modeling, and production test flows (software/firmware debug).

Responsibilities

• Schematic design, simulation, behavioral modeling, validation plan.
• Supervise layout engineer and hand-on layout of critical paths when needed.

Skills

Analog/mixed-signal design

Python

Signal processing

CMOS technologies

Education

MS/PhD in Electrical Engineering

Job description

Aeonsemi is a pre-IPO chip design company at the forefront of high-speed data communication for Physical AI. Backed by tier-one venture firms and in rapid revenue growth, we design customer-proven synchronous Ethernet networking and timing solutions that address the critical needs of secure data connectivity, robust timing synchronization, and efficient energy delivery - from AI edge nodes, autonomous systems to hyperscale data centers.

Analog/mixed-signal Design Engineer

Responsibilities

You will be working with a team of designers to design high performance RF/Analog/mixed-signal circuits for high-speed wireline transceiver products using advanced CMOS technologies.

• Schematic design, simulation, behavioral modeling, validation plan
• Supervise layout engineer and hand-on layout of critical paths when needed

Qualifications

• MS or Ph.D in electrical engineering with minimum 2 years of experience
• Knowledge of analog fundamentals: biasing circuits, clock generation and/or data converters

Additional Helpful Qualifications

• Proficient in Python or other programming language
• Basic proficiency with signal processing
• Interest in developing full-stack skills spanning mixed-signal design, simulation and modeling, and production test flows (software/firmware debug)

We offer

• Great team work environment with excellent career growth opportunities
• Competitive benefit package with health care, dental, 401k etc.