Senior Analog IC Design Engineer – Power & Clocking IP

onsemi; Allen (TX); On-site; USD 120,000 - 190,000; Full time

Job summary

onsemi is seeking a Senior Analog Design Engineer to develop power management and clocking IP for Treo-based SoCs. This hands-on role requires owning complex analog blocks from specification to silicon validation and collaborating across design, verification, and validation teams.

The ideal candidate has 5+ years of analog IC design experience with a solid understanding of device physics, layout effects, and SPICE/AMS simulation. Automotive/industrial exposure is a plus.

Qualifications

• 5+ years of experience in analog IC design.
• Experience designing power management and/or clocking circuits.
• Solid understanding of analog circuit design, device physics, and layout effects.
• Proficiency with SPICE/AMS simulation and mixed-signal verification.
• Ability to work independently and communicate technical issues effectively.

Responsibilities

• Design, simulate, and verify analog IP including LDOs, DC/DC converters, charge pumps, PLLs, DLLs, and oscillators.
• Own analog blocks from specification through silicon validation.
• Perform schematic design, layout review, post-layout verification, and corner analysis.
• Collaborate with digital, validation, and technology teams during integration and bring-up.
• Support lab characterization and post-silicon debugging.
• Document designs and develop reusable IP methodologies.

Skills

Analog IC design

Power management

Clocking circuits

SPICE/AMS simulation

Verilog-A/AMS modeling

Tools

Schematic capture

SPICE/AMS tools

Job description

onsemi is seeking a Senior Analog Design Engineer to develop power management and clocking IP for Treo-based SoCs. This hands-on role requires owning complex analog blocks from specification to silicon validation and collaborating across design, verification, and validation teams.

The ideal candidate has 5+ years of analog IC design experience with a solid understanding of device physics, layout effects, and SPICE/AMS simulation. Automotive/industrial exposure is a plus.