Senior AMS Verification Engineer - Mixed-Signal Co-Sim

InvestedintheMission; San Francisco (CA); On-site; USD 213,331 - 298,663; Full time

Benefits offered by this job

Relocation provided

Travel up to 10%

Technical assessment in interview

Temporary remote work exception

Job summary

Blue Origin seeks a Senior Staff or Principal AMS Design Verification Engineer to lead mixed-mode verification. You will define co-simulation methodologies and an EDA environment, and develop models for co-simulation across analog and digital domains.

You will create Verilog/SystemVerilog test benches and behavioral models, lead block- and chip-level AMS verification, and support both analog and digital teams during bring-up and usage, performing AMS simulations as needed.

Qualifications

• MS or PhD in Computer/Electrical Engineering.
• 5+ years of relevant industry experience.
• Hands-on CMOS analog mixed-signal circuit design and verification experience.
• Verilog/SystemVerilog modeling of analog/mixed-signal circuits and systems.
• Proficient with Cadence Virtuoso for schematic creation and simulation.
• Proficient in Python and MATLAB.
• Strong communication skills.
• US citizenship or eligible status.

Responsibilities

• Define the co-simulation methodology and EDA infrastructure with analog and digital teams.
• Create Verilog/SystemVerilog test benches and behavioral models of analog/mixed-mode circuits.
• Develop methodologies for block- and chip-level mixed-mode verification.
• Support analog and digital teams during model bring-up and usage.
• Perform AMS simulations.

Skills

Verilog/SystemVerilog

Python

MATLAB

Communication skills

Education

MS or PhD in Computer/Electrical Engineering

Tools

Cadence Virtuoso

Job description

Blue Origin seeks a Senior Staff or Principal AMS Design Verification Engineer to lead mixed-mode verification. You will define co-simulation methodologies and an EDA environment, and develop models for co-simulation across analog and digital domains.

You will create Verilog/SystemVerilog test benches and behavioral models, lead block- and chip-level AMS verification, and support both analog and digital teams during bring-up and usage, performing AMS simulations as needed.