A leading semiconductor company in Andover, Massachusetts is seeking a Senior Staff Engineer for Pre-Silicon Verification AMS. You will generate VerilogAMS/SystemVerilog models, perform verification of mixed-signal designs, and collaborate with engineering teams. Ideal candidates have a BSEE/ME and 3+ years of relevant experience. Skills in Cadence tools, Verilog, Python, and a good understanding of analog techniques are required, along with a strong ability to work in a team.
Qualifications
3+ years’ experience in pre-silicon verification.
Good understanding of analog design techniques.
Capable of generating schematics and netlist for simulation.
Responsibilities
Generate VerilogAMS/SystemVerilog models and correlate results with performance.
Coordinate Design Entry, Development, and Implementation of custom AMS models.
Generate tests for mixed-signal designs utilizing Cadence tools.
Skills
Verilog
Python
C
C++
Cadence Virtuoso
Xcelium Tool Suite
Mixed-signal simulation
Analog design techniques
Unix/Linux shell commands
Microsoft Office Tools
Education
BSEE/ME or equivalent
Tools
Cadence ADE Explorer
Job description
A leading semiconductor company in Andover, Massachusetts is seeking a Senior Staff Engineer for Pre-Silicon Verification AMS. You will generate VerilogAMS/SystemVerilog models, perform verification of mixed-signal designs, and collaborate with engineering teams. Ideal candidates have a BSEE/ME and 3+ years of relevant experience. Skills in Cadence tools, Verilog, Python, and a good understanding of analog techniques are required, along with a strong ability to work in a team.