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Positron AI is seeking an experienced ASIC verification engineer to lead verification strategy for AI inference ASICs. You will develop verification environments using SystemVerilog UVM and drive directed and constrained-random tests, collaborating with design and architecture teams to ensure coverage and closure.
Applicants should have 8+ years in ASIC verification, strong debugging skills, and experience with Cadence, Synopsys, and Mentor Graphics.
Positron AI is seeking an experienced ASIC verification engineer to lead verification strategy for AI inference ASICs. You will develop verification environments using SystemVerilog UVM and drive directed and constrained-random tests, collaborating with design and architecture teams to ensure coverage and closure.
Applicants should have 8+ years in ASIC verification, strong debugging skills, and experience with Cadence, Synopsys, and Mentor Graphics.