Senior AI Accelerator Silicon Validation Engineer

Anysilicon; Cupertino (CA); Hybrid; USD 150,000 - 210,000; Full time

Job summary

Anysilicon in Cupertino, CA seeks a Senior ASIC Validation Engineer to lead software-driven test development for our Trainium and Inferentia AI acceleration engines. You will drive testing strategies from subsystem to system level and ensure pre-silicon verification quality.

You will mentor teammates, collaborate with architects, design and verification groups, and scale verification across emulation and pre-silicon environments while advancing verification methodologies.

Qualifications

• 6+ years of experience as a verification or chip design engineer.
• 2+ years of experience in hardware/software co-design testing.
• 3+ years of experience in verifying AI acceleration engines.
• Strong knowledge of computer architecture and AI acceleration hardware architecture.

Responsibilities

• Develop, run, and debug software-based tests for pre-silicon validation of compute and AI acceleration engines.
• Create unit tests and end-to-end tests for simple operations and complex neural network layers.
• Focus on early testing development to identify bugs and support rapid software testing on emulation.
• Contribute to debugging across RTL to firmware and software layers.
• Scale verification infrastructure across pre-silicon and emulation teams.
• Collaborate with architects, chip design, verification, and software teams.
• Drive strategic technical decisions across verification teams for Trainium and Inferentia product lines.
• Mentor junior and senior verification engineers to foster growth.

Skills

Hardware/software co-design

Verification leadership

Troubleshooting

Team mentoring

Tools

Emulation platforms

Simulation tools

Job description

Anysilicon in Cupertino, CA seeks a Senior ASIC Validation Engineer to lead software-driven test development for our Trainium and Inferentia AI acceleration engines. You will drive testing strategies from subsystem to system level and ensure pre-silicon verification quality.

You will mentor teammates, collaborate with architects, design and verification groups, and scale verification across emulation and pre-silicon environments while advancing verification methodologies.