Silicon Validation Firmware Engineer for AI Accelerators

etched; San Jose (CA); On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Housing subsidy

Relocation support

Daily meals in office

Unlimited compute budget

Job summary

Etched is seeking a Silicon Validation Firmware Engineer to develop firmware and low-level software that validates our AI/ML accelerator ASICs across pre-silicon, FPGA, and post-silicon bring-up. You will craft validation firmware, test content, and automation, and actively debug real hardware in the lab.

You'll work with design, verification, architecture, and driver teams to ensure smooth transitions from pre-silicon verification to post-silicon validation, delivering robust, scalable

Qualifications

• Proficiency in C/C++ for firmware and Python for automation.
• Understanding of SoC computer architecture and embedded fundamentals.
• Experience with Linux, bootloaders, and device drivers.

Responsibilities

• Develop low-level validation firmware across emulation and physical silicon.
• Drive early bring-up of first silicon: boot, initialization, feature enablement, and debug.
• Perform deep-dive debug spanning firmware, RTL, electrical, protocol, and system levels.
• Build firmware infrastructure including HALs and low-level drivers for compute units and memory subsystems.
• Develop and extend validation automation and regression frameworks (CI/CD) to run validation at scale.

Skills

C/C++ firmware

Python scripting

Linux environments

Embedded systems

Debugging

Education

Bachelor's degree in EE/CE/CS

Tools

JTAG debugging

UART/Serial

CI/CD tooling

Oscilloscopes & measurement

Job description

Etched is seeking a Silicon Validation Firmware Engineer to develop firmware and low-level software that validates our AI/ML accelerator ASICs across pre-silicon, FPGA, and post-silicon bring-up. You will craft validation firmware, test content, and automation, and actively debug real hardware in the lab.

You'll work with design, verification, architecture, and driver teams to ensure smooth transitions from pre-silicon verification to post-silicon validation, delivering robust, scalable