Defense-Driven Digital ASIC/FPGA Engineer II

Prattwhitney

McKinney (TX)

On-site

USD 69,000 - 131,000

Full time

10 days ago
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Benefits offered by this job

Medical
Dental
Vision
401(k) match
Flexible work schedules
Paid time off
Employee Scholar Program

Job summary

RTX in McKinney, Texas, is seeking a Digital Design Engineer to support ASIC/FPGA design and verification for defense programs. You will translate system requirements into hardware designs, develop test benches, and verify functionality through simulation and hands-on testing.

The ideal candidate has a MS in EE/CE or related STEM field, experience with FPGAs (Xilinx/Altera), RTL design (Verilog/VHDL), and strong debugging skills using waveforms and logs, plus Python/Perl/Shell scripting.

Qualifications

  • Master’s degree in Electrical Engineering, Computer Engineering or related STEM major obtained by start date.
  • Experience with FPGA’s (Xilinx/Altera), RTL design (Verilog/VHDL), and simulation tools.
  • Experience with digital design concepts (state machines, pipelining, clocks, resets, etc.)
  • Debugging skills using waveforms and logs
  • Experience utilizing Python, Perl, or Shell.

Responsibilities

  • Support the development and execution of verification plans.
  • Build and maintain test benches (using UVM).
  • Debug simulation failures.
  • Create and run test cases.
  • Support functional coverage.
  • Collaborate across teams.

Skills

FPGA design
RTL design
Digital design concepts
Waveform debugging
Programming (Python/Perl/Shell)

Education

Master’s degree in Electrical Engineering/Computer Engineering or related STEM

Tools

Xilinx/Altera

Job description

RTX in McKinney, Texas, is seeking a Digital Design Engineer to support ASIC/FPGA design and verification for defense programs. You will translate system requirements into hardware designs, develop test benches, and verify functionality through simulation and hands-on testing.

The ideal candidate has a MS in EE/CE or related STEM field, experience with FPGAs (Xilinx/Altera), RTL design (Verilog/VHDL), and strong debugging skills using waveforms and logs, plus Python/Perl/Shell scripting.

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