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Benefits offered by this job
Competitive salary and benefits package
Flexible PTO
401k
Job summary
A cutting-edge technology firm based in California is seeking an experienced RTL to PD Engineer to ensure high-quality RTL drops to PD partners for next-gen AI silicon. You'll lead RTL-to-PD handoff processes, optimize PPA, and develop automated design flows using AI tools. The ideal candidate will have a strong background in SystemVerilog and 3+ years of RTL-to-PD implementation experience. Enjoy a competitive salary and benefits package, along with flexible PTO and 401k options.
Qualifications
3+ years of hands-on RTL-to-PD implementation experience.
Demonstrated success taking designs from synthesis through tapeout on real silicon.
Experience developing and maintaining scripted, automated design flows.
Responsibilities
Responsible for high quality RTL drops to PD Partners.
Own RTL-to-PD handoff flows, ensuring designs meet targets.
Build and maintain automated design flows leveraging AI tools.
Skills
SystemVerilog/Verilog proficiency
Static timing analysis expertise
Scripted design flows development
RTL-to-PD implementation experience
Education
Bachelor's or Master's degree in Electrical Engineering
Tools
Cadence/Synopsys tools
Job description
A cutting-edge technology firm based in California is seeking an experienced RTL to PD Engineer to ensure high-quality RTL drops to PD partners for next-gen AI silicon. You'll lead RTL-to-PD handoff processes, optimize PPA, and develop automated design flows using AI tools. The ideal candidate will have a strong background in SystemVerilog and 3+ years of RTL-to-PD implementation experience. Enjoy a competitive salary and benefits package, along with flexible PTO and 401k options.