RTL Power Optimization Engineer — AI-Driven Pre‑Silicon

NVIDIA Corporation; Santa Clara (CA); On-site; USD 116,000 - 219,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation in Santa Clara, CA is hiring for a power optimization role focused on pre-silicon RTL and AI-driven techniques for GPUs and networking chips. You will collaborate with Architects, RTL designers, software engineers, and ASIC teams to study and reduce energy consumption across workloads.

The position requires strong Python skills, ML-enabled EDA approaches, and experience with PowerArtist/PrimeTime PX.

Qualifications

• MS or PhD in Electrical Engineering, Computer Engineering, or related field.
• Understanding RTL power optimization fundamentals: switching activity, clock/enable efficiency.
• Knowledge of backend flows: logic synthesis, place-and-route, and impact on post-layout power.
• Familiarity with RTL low-power techniques and trade-offs (clock gating, operand isolation, power gating).
• Exposure to industry power analysis tools (PowerArtist, PrimeTime PX) and interpreting reports.

Responsibilities

• Use internal and industry RTL power analysis tools to improve product power efficiency.
• Use AI to deliver RTL and Architecture Power optimization solutions.
• Develop and share best practices for pre-silicon power analysis.
• Perform comparative power analysis to spot trends and anomalies.
• Interact with architects and RTL designers to interpret power data and drive fixes.
• Select and run workloads for power analysis.
• Prototype a new architectural feature in Verilog and analyze power.

Skills

Python programming

Strong analytical skills

Communication skills

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

PowerArtist

PrimeTime PX

Verilog

EDA tools

Job description

NVIDIA Corporation in Santa Clara, CA is hiring for a power optimization role focused on pre-silicon RTL and AI-driven techniques for GPUs and networking chips. You will collaborate with Architects, RTL designers, software engineers, and ASIC teams to study and reduce energy consumption across workloads.

The position requires strong Python skills, ML-enabled EDA approaches, and experience with PowerArtist/PrimeTime PX.