RTL Design Engineer

Apple Inc.

Cary (NC)

On-site

USD 110,000 - 170,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Apple Inc. is seeking an RTL Design Engineer in the United States to specify, design, verify and support lab bring-up of high-speed digital and mixed-signal circuits.

You will work with a team to model and integrate high-performance IPs, write test scripts, and analyze lab data to optimize performance and power.

Qualifications

  • Bachelor's degree in Electrical Engineering.
  • Strong knowledge of RTL design, Verilog and SystemVerilog.
  • Experience with front-end tools and verification methodologies.
  • Knowledge of mixed-signal concepts and analog behavioral modeling.
  • Synthesis, static timing analysis, and DFT familiarity.
  • Proficiency in scripting languages (Perl, Python).
  • Experience using GenAI tools for code design.
  • Excellent communication and presentation skills.
  • Experience with DSP fundamentals.

Responsibilities

  • Specify and micro-architect RTL blocks in mixed-signal circuits.
  • RTL coding of blocks and participate in design verification.
  • Write meaningful assertions, debug code, and interact with DV team.
  • Assist lab bring-up and debugging; run test scripts and analyze data.

Skills

RTL design
Verilog
SystemVerilog
Mixed-signal concepts
Analog circuit modeling
Synthesis
Static timing
DFT
SystemVerilog assertions
Scripting (Perl/Python)
GenAI tools
DSP fundamentals
Communication skills

Education

Bachelor's degree in Electrical Engineering

Tools

Verilog simulators
Linters
CDC
RDC
LEQ
UPF

Job description

At Apple, we work every day to craft products that enrich people’s lives. If you’re passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. Are you looking to expand your chip design career and challenge yourself in a technical and multi-disciplinary endeavor? If so, this is an exciting position in the world class Apple mixed-signal silicon design team! This role will build upon your solid foundation in digital logic circuits while introducing mixed signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry. As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits.

Description

In this job you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.

Minimum Qualifications
  • Bachelors of Science in Electrical Engineering.
Preferred Qualifications
  • Proven knowledge of RTL design, Verilog and SystemVerilog
  • Deep knowledge of front-end tools (Verilog simulators, linters, CDC, RDC, LEQ, UPF)
  • Low power design methodologies and techniques to reduce dynamic and static IC power
  • ECO design flows and methodologies
  • Proven understanding of mixed signal concepts and experience with analog circuit behavioral modeling
  • Proven knowledge of synthesis, static timing and DFT
  • Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
  • Knowledge of scripting languages (i.e. Perl, JSON and Python)
  • Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code
  • Digital signal processing fundamentals including signal processing concepts
  • Strong communication and presentation skills

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

RTL Design Engineer
RTL Design Engineer

Apple Inc. • Melbourne (FL)

On-site
USD 110,000 - 170,000
RTL Design Engineer
RTL Design Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 120,000 - 180,000
RTL Design Engineer
RTL Design Engineer

Apple Inc. • Austin (TX)

On-site
USD 130,000 - 190,000
RTL Design Engineer
RTL Design Engineer

Apple Inc. • Waltham (MA)

On-site
USD 116,000 - 203,000
RTL Design Engineer
RTL Design Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 129,000 - 226,000
Medical & dental coverage
Retirement benefits
Stock programs
+2
Mixed Signal RTL Design Engineer
Mixed Signal RTL Design Engineer

Apple Inc. • Sunnyvale (CA)

On-site
USD 184,000 - 325,000
Medical and dental coverage
Employee stock purchase plan
Educational reimbursement
+1
Mixed Signal RTL Design Engineer
Mixed Signal RTL Design Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 184,000 - 325,000
Employee stock programs
Discretionary bonuses or commissions
Relocation assistance
+1
FE RTL Infrastructure - CAD Engineer
FE RTL Infrastructure - CAD Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 100,000 - 130,000
ASIC Design Engineer
ASIC Design Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 150,000 - 210,000
RTL Design Engineer - DSP & Mixed-Signal
RTL Design Engineer - DSP & Mixed-Signal

Apple Inc. • Cupertino (CA)

On-site
USD 129,000 - 226,000
Medical & dental coverage
Retirement benefits
Stock programs
+2