RTL Design Engineer

TYLsemi

United States

Remote

USD 120,000 - 180,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

TylSemi Solutions Private Limited is seeking an experienced RTL Design Engineer to join our semiconductor design team. You will design high‑performance digital IPs and SoC components for AI, HPC, and Networking applications, collaborating with architecture, verification, physical design, and software teams.

You will contribute to microarchitecture, implement power-aware logic, and drive robust silicon through the ASIC development lifecycle, ensuring quality and timely delivery across projects.

Qualifications

  • Bachelor’s or Master’s in Electrical/Electronics/Computer Engineering or related field.
  • 5+ years of RTL design and digital IC development.
  • Strong knowledge of ASIC design flow and verification basics.

Responsibilities

  • Develop RTL designs using Verilog/SystemVerilog based on specifications.
  • Participate in microarchitecture definition and design reviews.
  • Implement high-performance, area-efficient, and power-optimized digital logic.
  • Develop and maintain design documentation, specifications, and guidelines.
  • Collaborate with verification engineers to define verification strategies and debug issues.
  • Perform RTL simulations and support design validation activities.
  • Analyze synthesis results and work with physical design teams to optimize timing, power, and area.
  • Support SoC integration activities and resolve integration-related issues.
  • Participate in design reviews, code reviews, and quality improvement initiatives.
  • Work closely with cross-functional teams throughout the ASIC development lifecycle.

Skills

Verilog/SystemVerilog
RTL design
FSMs
CDC concepts
Low-power design
Digital IC development
ASIC design flow
Analytical skills

Education

Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering

Tools

Verilog simulators (ModelSim/XSIM)
Timing analysis tools
Scripting (Python)

Job description

Role Overview

TylSemi Solutions Private Limited is seeking a talented and motivated RTL Design Engineer to join our growing semiconductor design team. In this role, you will be responsible for the design and development of high-performance digital IPs and SoC components for next-generation AI, HPC, and Networking applications. You will work closely with architecture, verification, physical design, and software teams to deliver robust and scalable silicon solutions.

What You’ll Do
  • Develop RTL designs using Verilog/System Verilog based on architectural and microarchitecture specifications.
  • Participate in microarchitecture definition and design reviews.
  • Implement high-performance, area-efficient, and power-optimized digital logic.
  • Develop and maintain design documentation, specifications, and implementation guidelines.
  • Collaborate with verification engineers to define verification strategies and debug functional issues.
  • Perform RTL simulations and support design validation activities.
  • Analyze synthesis results and work with physical design teams to optimize timing, power, and area.
  • Support SoC integration activities and resolve integration-related issues.
  • Participate in design reviews, code reviews, and quality improvement initiatives.
  • Work closely with cross-functional teams throughout the ASIC development lifecycle.
Required Qualifications
  • Bachelor’s or master’s degree in electrical engineering, Electronics Engineering, Computer Engineering, or related field.
  • 5+years experience in RTL design and digital IC development.
  • Strong understanding of digital design fundamentals, computer architecture, and ASIC design flow.
  • Proficiency in:
    • Verilog/System Verilog
    • RTL design and coding methodologies
    • Logic design and finite state machines (FSMs)
    • Clock domain crossing (CDC) concepts
    • Low-power design fundamentals
  • Experience with simulation and debugging tools.
  • Familiarity with synthesis and timing analysis concepts.
  • Strong analytical and problem-solving skills.
Preferred Qualifications
  • Experience designing IPs or subsystems for AI, HPC, Networking, or data-center applications.
  • Knowledge of industry-standard protocols such as:
    • AXI/AHB/APB
    • PCIe
    • DDR
    • Ethernet
    • CXL
    • UCIe
  • Familiarity with scripting languages such as Python, Perl, Shell, or TCL.
  • Exposure to low-power design methodologies and power intent formats (UPF/CPF).
  • Understanding of linting, CDC, RDC, and formal verification tools.
  • Experience with FPGA prototyping is a plus.
Key Attributes
  • Strong attention to detail and commitment to design quality.
  • Passion for semiconductor innovation and cutting-edge technologies.
  • Excellent debugging and problem-solving abilities.
  • Ability to work effectively in a collaborative and fast-paced environment.
  • Strong communication and teamwork skills.
  • Ownership mindset with a focus on delivering high-quality silicon.
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

RTL Design Engineer
RTL Design Engineer

Game Seven Staffing • California (MO)

Hybrid
USD 140,000 - 210,000
Senior RTL Design Engineer for AI/HPC ASICs
Senior RTL Design Engineer for AI/HPC ASICs

TYLsemi • United States

Remote
USD 120,000 - 180,000
Staff RTL Engineer
Staff RTL Engineer

Oho Group • San Jose (CA)

On-site
USD 130,000 - 160,000
RTL Designer
RTL Designer

Acceler8 Talent • Mountain View (CA)

On-site
USD 180,000 - 260,000
Digital Design Engineer - ASIC
Digital Design Engineer - ASIC

Gyga Force • San Jose (CA)

On-site
USD 120,000 - 160,000
Equity
401(k) w/ 3% Match
Comprehensive medical, dental, vision, and life insurance
+3
Lead ASIC RTL Design Engineer
Lead ASIC RTL Design Engineer

10xTalents • San Francisco (CA)

On-site
USD 130,000 - 160,000
RTL Design Engineer
RTL Design Engineer

Acceler8 Talent • Mountain View (CA)

On-site
USD 120,000 - 160,000
RTL Design Engineer
RTL Design Engineer

IC Enable • Richardson (TX)

On-site
USD 110,000 - 160,000
RTL Design Tech Lead (ASIC/SoC)
RTL Design Tech Lead (ASIC/SoC)

Bolt Graphics, Inc. • Sunnyvale (CA)

On-site
USD 220,000 - 250,000
Medical, Dental, & Vision - 100% covered premiums
Equity - Stock Options
401(k) match
RTL Design Tech Lead (ASIC/SoC)
RTL Design Tech Lead (ASIC/SoC)

Bolt Graphics • Sunnyvale (CA)

On-site
USD 220,000 - 250,000
100% covered medical, dental, & vision premiums
Stock options
401(k) match
+1