RFIC Layout Engineer — Energy-Efficient Wireless CMOS

Apple, Inc.; Sunnyvale (CA); On-site; USD 124,000 - 218,000; Full time

Job summary

Apple, Inc. in Sunnyvale, CA seeks an RFIC Layout Engineer to join the Wireless SoC Radio Team and bring next-generation wireless CMOS radios to production. You will design RF/analog blocks from LNA to PA, and ensure layout quality through full verification.

Responsibilities include transistor-level layout, block floorplanning, and EMI/matching optimization, with CALIBRE and Cadence tool proficiency highly valued.

Qualifications

• Bachelor's degree in a relevant field is required.
• Experience with RF/analog layout for radio transceivers is preferred.
• Strong knowledge of layout techniques for device matching and parasitics.
• Familiarity with RC delay, electromigration and high-frequency routing.

Responsibilities

• Detail transistor-level layout of RF and analog blocks (LNA, mixers, PLL, LO, modulators, PA, ADC/DAC).
• Layout through full verification: extraction, DRC, LVS, and DFM checks.
• Collaborate with designers on block floorplanning and power/GND routing.
• Perform layout reviews focusing on matching, EMI, and signal integrity.

Skills

Deep sub-micron CMOS layout

RF/analog layout

Device matching

RF shielding

High frequency routing

RC delay concepts

Electromigration awareness

Guard rings, DNW, PN junctions

CALIBRE DRC/ERC/LVS (FinFet)

Cadence tools

PERL or SKILL scripting

Education

Bachelor's degree

Tools

Cadence layout tools

Job description

Apple, Inc. in Sunnyvale, CA seeks an RFIC Layout Engineer to join the Wireless SoC Radio Team and bring next-generation wireless CMOS radios to production. You will design RF/analog blocks from LNA to PA, and ensure layout quality through full verification.

Responsibilities include transistor-level layout, block floorplanning, and EMI/matching optimization, with CALIBRE and Cadence tool proficiency highly valued.