RFIC Design Engineer: mmWave Transceivers & PLLs

Amazon Inc.; Redmond (WA); On-site; USD 115,000 - 160,000; Full time

Benefits offered by this job

Health insurance

Restricted stock units (RSUs)

Job summary

Amazon Kuiper Manufacturing Enterprises LLC is seeking an RFIC Design Engineer to drive RFIC front‑end models and transceivers with an experienced cross‑disciplinary staff in a fast‑paced environment.

You will lead area/power‑efficient RFIC chip implementations with multiple transceiver chains, work with packaging/HW/EE/FW teams, and explore mm‑wave architectures, conducting detailed trade‑offs and robust validations for volume production.

Qualifications

• Bachelor's degree in Electrical Engineering or related field is required.
• Experience with current and upcoming RF standards (4G/5G NR, WiMAX, 802.11ad) is expected.
• Experience in mm‑Wave/RFIC design, preferably in an advanced node.

Responsibilities

• Collaborate with systems, digital design, and chip implementation teams to specify transceivers and RFIC front‑end models.
• Lead area/power‑efficient RFIC chip implementations with multiple transceiver chains and integrated PLLs.
• Work with packaging/HW/EE/FW teams for seamless system integration.
• Define analog/digital boundary requirements for calibration, clock generation, and timing.
• Explore mm‑wave/RF architectures (VCOs, LNAs, PAs, etc.) and present trade‑offs.
• Design and simulate on‑chip inductors, baluns, and power combiners; perform layout and extraction.
• Specify bench and production test plans for designs.

Skills

RF design

mm-wave

RF standards familiarity

RF test equipment

Education

Bachelor's degree in Electrical Engineering or related field

Tools

EMX/HFSS

Job description

Amazon Kuiper Manufacturing Enterprises LLC is seeking an RFIC Design Engineer to drive RFIC front‑end models and transceivers with an experienced cross‑disciplinary staff in a fast‑paced environment.

You will lead area/power‑efficient RFIC chip implementations with multiple transceiver chains, work with packaging/HW/EE/FW teams, and explore mm‑wave architectures, conducting detailed trade‑offs and robust validations for volume production.