Remote RTL Design Engineer for SoC & Memory Controllers

Inabia Software & Consulting Inc.; United States; Remote; USD 96,000 - 138,000; Full time

Job summary

Inabia Software & Consulting Inc. is seeking an RTL Design Engineer for a fully remote 12-month contract engagement focused on custom silicon development.

The role owns the full micro-architecture and RTL design lifecycle for complex digital blocks, with hands-on fluency in SystemVerilog and recent memory controller design experience. The engineer will define micro-architecture, develop RTL, drive IP integration, and collaborate with DV teams to ensure design sign-off.

Qualifications

• Hands-on SystemVerilog RTL design experience.
• Ability to define micro-architecture from specs.
• Experience designing memory controllers and SoC integration.
• Familiarity with CDC and RDC sign-off workflows.
• Proven ability to work independently with minimal ramp-up time.

Responsibilities

• Own micro-architecture definition derived from high-level functional specifications.
• Develop and implement RTL for complex digital blocks using SystemVerilog/Verilog.
• Drive digital block control logic and IP integration.
• Participate in subsystem-level architecture alignment discussions.
• Support design sign-off activities including CDC, RDC, lint, and synthesis readiness checks.
• Collaborate closely with Design Verification (DV) teams for closure and debug.
• Take full project lifecycle ownership with minimal supervision.

Skills

RTL design

SystemVerilog/Verilog

Micro-architecture

SoC integration

Memory controllers

CDC/RDC sign-off

IP integration

Tools

SystemVerilog

Verilog

Job description

Inabia Software & Consulting Inc. is seeking an RTL Design Engineer for a fully remote 12-month contract engagement focused on custom silicon development.

The role owns the full micro-architecture and RTL design lifecycle for complex digital blocks, with hands-on fluency in SystemVerilog and recent memory controller design experience. The engineer will define micro-architecture, develop RTL, drive IP integration, and collaborate with DV teams to ensure design sign-off.