Remote Principal PD Engineer for SoC

OpenKrill; United States; Remote; USD 140,000 - 210,000; Full time

Benefits offered by this job

Comprehensive medical, dental, and視s

401(k) retirement plan

Equity

Performance incentives

Job summary

Baya Systems, Inc seeks a Principal Engineer-Physical Design. This is a fully remote role with US-wide eligibility.

The position requires a bachelor's degree in Electrical Engineering or Computer Engineering and 5 years of related experience, focusing on RTL-to-GDS flows and high-performance PD. You will own floor planning, PD validation, clock tree synthesis, and PDV flow, collaborating with micro-architects to optimize performance, power, and area across block to system level designs.

Qualifications

• Bachelor's degree or foreign equivalent in Electrical Engineering or Computer Engineering or related field.
• 5 years of experience in Job Offered or as Project Engineer, Senior Project Engineer, Design Engineer or related field.
• Experience in floor planning, physical design validation, clock trees, physical design flow automation, ICC, and SoC Architecture.

Responsibilities

• Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing & power closure, EM/IR, PDV and final PD sign off.
• Own physical design & implementation of high-performance designs from block level to system level components.
• Collaborate with Micro-architects to explore performance, power and area trade-offs for high performance and low power designs.
• Perform various physical design validation (PDV) flows for Timing, Power, EM/IR, etc. to ensure physical design quality.
• Perform design rule checks (DRC), LVS checks, and other physical verification tasks.

Skills

Floor planning

Physical design validation

Clock tree synthesis

PD flow automation

SoC Architecture

ICC

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Job description

Baya Systems, Inc seeks a Principal Engineer-Physical Design. This is a fully remote role with US-wide eligibility.

The position requires a bachelor's degree in Electrical Engineering or Computer Engineering and 5 years of related experience, focusing on RTL-to-GDS flows and high-performance PD. You will own floor planning, PD validation, clock tree synthesis, and PDV flow, collaborating with micro-architects to optimize performance, power, and area across block to system level designs.