Radar FPGA Lead Engineer | On-site Seattle

EVONA; Seattle (WA); On-site; USD 140,000 - 210,000; Full time

Job summary

EVONA in Seattle is seeking a Senior FPGA Engineer to lead RTL design and FPGA development for advanced radar systems. The role involves translating radar algorithms into reliable, mission-critical firmware while collaborating across hardware, software, mechanical, and signal-processing teams.

The engineer will own complex projects, make architecture decisions, and deliver high-quality solutions in a fast-moving startup environment. On-site work in Seattle is required.

Qualifications

• 8+ years of embedded firmware development experience, preferably with radar or mission-critical systems.
• Strong RTL design experience using Verilog and/or VHDL, including satellite/aerospace applications.
• Hands-on experience bringing up RTL-based designs on target hardware.
• Experience integrating FPGA/SoC designs, including synthesis, place-and-route, and timing analysis.
• Familiarity with I2C, SPI, UART, and RS-422.
• Ability to read and interpret electrical schematics.
• Experience with Git, CI pipelines, code reviews, and version-control workflows.
• Ability to work independently in a lean, rapidly evolving environment.

Responsibilities

• Define and refine firmware requirements with a multidisciplinary engineering team.
• Architect, design, and implement embedded firmware for a radar sensor payload.
• Develop control and signal-processing functions in Verilog or VHDL.
• Evaluate implementation complexity, maintainability, and FPGA resource requirements.
• Produce technical trade studies to support architecture and implementation decisions.
• Integrate RTL designs onto FPGA and SoC platforms through synthesis, place and route, timing analysis, and timing closure.
• Lead bring-up, verification, and validation of FPGA designs on prototype and flight hardware.
• Collaborate with radar algorithm, electrical, software, and mechanical engineers to build dependable embedded systems.
• Support recruitment, interviewing, and hiring of additional engineering team members.

Skills

RTL design

Verilog/VHDL

Embedded firmware

Radar systems

Git CI pipelines

Schematic reading

Education

BS or MS in Electrical Engineering

Tools

Vivado/Xilinx toolchain

ModelSim/Simulation tools

Git

Job description

EVONA in Seattle is seeking a Senior FPGA Engineer to lead RTL design and FPGA development for advanced radar systems. The role involves translating radar algorithms into reliable, mission-critical firmware while collaborating across hardware, software, mechanical, and signal-processing teams.

The engineer will own complex projects, make architecture decisions, and deliver high-quality solutions in a fast-moving startup environment. On-site work in Seattle is required.