Quantum Interposer Design Engineer

Intel Corporation; Hillsboro (OR); On-site; USD 142,000 - 200,000; Full time

Benefits offered by this job

Competitive pay

Stock bonuses

Health benefits

Retirement plan

Paid vacation

Job summary

Intel Corporation in Oregon seeks a Quantum Interposer Design Engineer to advance physical design and integration of interposers for quantum computing, collaborating with SI/PI, thermal, and system teams. The role emphasizes reliable design, validation, and clear technical communication in a fast-paced research setting.

The position expects a strong background in MS/PhD-level electrical engineering, advanced packaging, and Cadence Virtuoso, with a focus on silicon testchips and interposers.

Qualifications

• MS degree in Electrical Engineering with 5+ years in physical design of silicon testchips/interposers or related hardware.
• OR PhD with relevant experience in physical design, SI/PI, and packaging technologies.
• Cadence Virtuoso experience required.
• Understanding of SI/PI impact on physical design.
• Understanding of advanced packaging technologies.

Responsibilities

• Physical design and integration of interposers used within advanced packaging for quantum computing
• Collaborate with silicon testchip, SI/PI, thermal, and system integration engineers to meet design requirements
• Design validation and verification including DRC/LVS
• Deliver milestones and document designs for stakeholders
• Present designs to stakeholders and prepare technical documentation
• Keep current with packaging tech through conferences and literature

Skills

Communication skills

Analytical thinking

Collaboration

Adaptability

Quantum tech passion

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Virtuoso

Synopsys

Ansys

Job description

Job Details

Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We are pioneering spin qubit technology in silicon quantum dots, combining cutting‑edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. Join Intel's Quantum Computing Group where we are building the future of quantum computing.

Key Responsibilities

• Physical design and integration of interposers used within advanced packaging for quantum computing
• Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers
• Design validation and verification; including DRC and LVS
• Deliver and disseminate design milestones to stakeholders
• Communicate designs in presentations and relevant documentation
• Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers

Desired Traits

• Excellent communication and presentation skills for technical and non-technical audiences
• Strong analytical thinking and problem-solving capabilities
• Collaborative mindset with ability to work effectively across diverse teams
• Adaptability to work in a fast-paced, innovative research environment
• Passion for pushing the boundaries of quantum technology development

Qualifications

Minimum Qualifications

• M.S. degree in Electrical Engineering AND 5+ years of experience in physical design of silicon testchips, interposers, and/or related hardware
• OR Ph.D. degree in Electrical Engineering with academic or work experience in the related areas. The experience must include:
• Cadence Virtuoso
• Understanding of how signal and power integrity (SI/PI) impacts physical design
• Understanding of advanced packaging technologies

Preferred Qualifications

• Strong understanding of superconducting metals
• Proven experience with Synopsys and Ansys software packages for APR (automated place and route)

Job Information

Job Type: Experienced Hire
Shift: Shift 1 (United States of America)
Primary Location: US, Oregon, Hillsboro
Additional Locations:

Position of Trust: N/A

Annual Salary Range: $141,910.00-200,340.00 USD

Benefits include competitive pay, stock bonuses, benefit programs which include health, retirement, and vacation

Work Model: This role will require an on-site presence.

Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during your hiring process, please report this immediately to your recruiter.

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.