PSV PCIE Validation & Emulation Engineer

Canvendor; San Jose (CA); On-site; USD 90,000 - 164,000; Full time

Job summary

A leading company in computer hardware manufacturing is seeking a PSV PCIE Validation & Emulation Engineer in San Jose, CA. The role involves creating test plans, performing compliance testing, and collaborating with design teams to validate PCIe subsystems. Ideal candidates will have a strong engineering background alongside advanced programming skills and 5-8 years of experience in PCIe architecture.

Qualifications

• 5 to 8 years of experience required.
• Exposure to PCIe BAR and IOMMU architecture preferred.
• Experience running and tuning system performance benchmarks.

Responsibilities

• Create and document PCIe validation test plans.
• Perform compliance testing to ensure adherence to PCIe standards.
• Identify and resolve performance bottlenecks in PCIe interface.

Skills

Knowledge of PCIe Architecture

Validation

Debug Experience

Advanced programming skills in C/C++

Understanding of operating systems

Hardware Debug Skills

Education

B.E/M.E in Electronics & Communication Engineering

Tools

Oscilloscope

Multimeter

Logic Analyzer

Job description

PSV PCIE Validation & Emulation Engineer

PSV PCIE Validation & Emulation Engineer

4 days ago Be among the first 25 applicants

Direct message the job poster from Canvendor

IT & Engineering Recruiter at Canvendor | Hiring for Fulltime/Contract Consultants. Drop your Resume E: [e-mail]

We do have a PSV PCIE Validation & Emulation Engineer role in San Jose, CA (Onsite). Please find the Job Description below and kindly respond back with your updated resume.

Job Title: PSV PCIE Validation & Emulation Engineer

Job Location: San Jose, CA (Onsite)

Duration: 12+ Months

Job Description:

• Create and document PCIe validation test plans, test cases, and scripts.
• Perform compliance testing to ensure adherence to PCIe standards.
• Identify and resolve performance bottlenecks within the PCIe interface.
• Work closely with hardware and software design teams, and potentially other stakeholders, to ensure successful integration and validation of PCIe subsystems.

Requirement:

• B.E/M. E in Electronics & Communication Engineering
• 5 to 8 years of experience
• Good knowledge and understanding of PCIe Architecture, Validation, Debug Experience.
• Exposure to PCIe BAR and IOMMU architecture
• Develop the critical pieces of EAI Firmware used to deploy inference jobs on EAI processors
• Advanced programming skills in C/C++ for operating system kernel & systems development
• Understanding of RISC-V architecture is a plus
• Deep understanding of operating systems concepts, data structures, x86-64 and accelerator architectures
• Experience running, analyzing, and tuning system performance benchmarks
• Experience with low-level debug tools as well as emulators and simulators
• Excellent understanding of computer architecture and operating system concepts including, but not limited to, memory management
• Experience in Hardware Debug Skills - Oscilloscope, Multimeter, Logic Analyzer

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Contract

Job function

• Industries

  Computer Hardware Manufacturing

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