PSV PCIe / Memory Validation & Emulation Engineer

Rcube Creative Consulting; San Jose (CA); On-site; USD 100,000 - 140,000; Full time

Job summary

A leading IT consulting firm is seeking a PSV PCIe / Memory Validation & Emulation Engineer in San Jose, CA. The role involves defining and executing validation for integrated SoCs, focusing on PCIe and memory subsystems. Candidates should have a strong background in electronics engineering and relevant experience in validation and debugging. This contract position offers competitive compensation based on experience.

Qualifications

• 5 to 8 years of experience in PCIe and memory validation.
• Proficient in advanced C/C++ programming for OS kernel development.
• Experience with hardware debug tools and understanding of OS concepts.

Responsibilities

• Define, develop, and execute functional validation for integrated SoCs.
• Create and document PCIe validation test plans and scripts.
• Perform PCIe compliance testing and silicon debug.

Skills

PCIe Architecture

Validation

Debug

Advanced C/C++ programming

Hardware debug tools

Understanding of computer architecture

Education

B.E/M.E in Electronics & Communication Engineering

Tools

Oscilloscope

Multimeter

Logic Analyzer

Job description

PSV PCIe / Memory Validation & Emulation Engineer

Location: San Jose, CA

We are actively hiring for the position of PSV PCIe / Memory Validation & Emulation Engineer at Rcube Creative Consulting in San Jose, CA. If interested, please apply to [e-mail].

Job Details:

• Experience: 5 to 8 years
• Salary Range: DOE (Depending on Experience)
• Duration: 3 Months (Initial)
• Client: Tessolve/EnChargeAI

Responsibilities:

• Define, develop, and execute functional validation for integrated SoCs, focusing on PCIe and Memory Subsystems, their interaction with CPU functions, and system-level features.
• Create and document PCIe validation test plans, test cases, and scripts to ensure compliance with standards.
• Perform PCIe compliance testing and identify/resolve performance bottlenecks.
• Develop and execute memory subsystem validation for LPDDR/DDR interfaces.
• Collaborate with hardware/software teams for successful integration and validation of PCIe and memory subsystems.
• Perform silicon debug to identify root causes of failures in PCIe and memory subsystems.
• Develop tools and strategies for debugging high-speed PCIe and memory interfaces.
• Apply hardware/software tools to ensure validation coverage and performance goals.

Must Have Skills:

• B.E/M.E in Electronics & Communication Engineering
• PCIe Architecture, Validation, and Debug (BAR, IOMMU)
• LPDDR/DDR Memory Architecture, Validation, and Debug
• Advanced C/C++ programming for OS kernel & systems development
• Hardware debug tools (Oscilloscope, Multimeter, Logic Analyzer)
• Understanding of computer architecture, OS concepts, and memory management

Preferred Skills:

• PCIe 4.0/5.0/6.0, x86-64, and accelerator architectures
• System performance benchmarking and tuning
• Low-level debug tools, emulators, and simulators
• Python scripting

Additional Details:

• Seniority level: Mid-Senior level
• Employment type: Contract
• Job function: Quality Assurance
• Industries: IT Services and IT Consulting