PCIe Validation and Emulation Engineer

Element Technologies Inc; San Jose (CA); On-site; USD 100,000 - 150,000; Full time

Job summary

A leading technology company is seeking a PCIe Validation & Emulation Engineer in San Jose, CA. The role involves creating validation test plans and ensuring compliance with PCIe standards, requiring strong knowledge of PCIe architecture and advanced C/C++ programming skills. This long-term contract position offers an opportunity to work in the semiconductor manufacturing industry, collaborating with hardware and software teams.

Qualifications

• Strong knowledge of PCIe Architecture, Validation, and Debugging.
• Experience with PCIe BAR and IOMMU architecture.
• Advanced programming skills in C/C++ for OS kernel and systems development.

Responsibilities

• Create and document PCIe validation test plans, test cases, and scripts.
• Perform compliance testing to ensure adherence to PCIe standards.
• Identify and resolve performance bottlenecks within the PCIe interface.

Skills

PCIe 4.0

PCIe 5.0

PCIe 6.0

C/C++

IOMMU

RISC V

x86-64 architecture

performance benchmarks

Tools

Oscilloscope

Multimeter

Logic Analyzer

Job description

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We are seeking a PCIe Validation & Emulation Engineer in San Jose, CA.

Title: PCIe Validation & Emulation Engineer

Location: San Jose, CA

Duration: Long Term Contract

Responsibilities:

1. Create and document PCIe validation test plans, test cases, and scripts.
2. Perform compliance testing to ensure adherence to PCIe standards.
3. Identify and resolve performance bottlenecks within the PCIe interface.
4. Collaborate with hardware and software design teams and other stakeholders to ensure successful integration and validation of PCIe subsystems.

Key Skills:

PCIe 4.0, 5.0, 6.0, C/C++, IOMMU, RISC V, x86-64 architecture, accelerators, Oscilloscope, Multimeter, Logic Analyzer, performance benchmarks.

Qualifications:

• Strong knowledge of PCIe Architecture, Validation, and Debugging.
• Experience with PCIe BAR and IOMMU architecture.
• Developing critical components of EAI Firmware for inference deployment on EAI processors.
• Advanced programming skills in C/C++ for OS kernel and systems development.
• Understanding of RISC-V architecture is a plus.
• Deep understanding of OS concepts, data structures, x86-64, and accelerator architectures.
• Experience analyzing and tuning system performance benchmarks.
• Proficiency with low-level debug tools, emulators, and simulators.
• Excellent understanding of computer architecture and OS memory management concepts.
• Hardware debug skills: Oscilloscope, Multimeter, Logic Analyzer.

Seniority level

• Mid-Senior level

Employment type

• Contract

Job industry

• Semiconductor Manufacturing