Program Management - Principal TPM – Packaging, SI/PI & System Integration

Eliyan; United States; On-site; USD 210,000 - 270,000; Full time

Benefits offered by this job

Competitive salary

Meaningful equity

Comprehensive benefits

Job summary

Eliyan is seeking a Principal Technical Program Manager to lead multi-project packaging and SI/PI programs in a fast-paced startup environment. You will own schedules, risk, and cross-team strategy spanning 2.5D/3D integration to co-packaged optics, coordinating with ASIC, platform, and external vendors.

You’ll manage complex, concurrent programs, drive structured problem-solving, and interface with executives.

Qualifications

• 15+ years of semiconductor program management experience, including advanced packaging/SI-PI programs.
• Deep technical fluency across packaging, SI/PI, and system design flows with external vendors.
• Experience managing OSAT, substrate vendor, and foundry relationships through qualification and production.
• Proven ability to drive multiple concurrent programs with real-time visibility and reprioritization when needed.
• Strong leadership and decision-making skills for cross-functional tradeoffs between silicon, packaging, and manufacturing constraints.
• Excellent verbal and written communication with customers and external partners.

Responsibilities

• Own and drive program schedules for advanced packaging and SI/PI workstreams—from 2.5D/3D integration to qualification and ramp.
• Engage with analog/digital design teams, package engineers, and vendors to keep programs on track.
• Manage multiple concurrent projects with real-time status dashboards and risk mitigation.
• Lead structured problem-solving sessions to unblock bottlenecks and keep milestones aligned.
• Interface with customers and partners on deliverables, co-design requirements, and integration milestones.
• Define budgets and allocate resources across internal teams and external partners; track expenses.

Skills

Program management

Cross-functional collaboration

Risk management

Stakeholder communication

Scheduling & budgeting

Agile & Waterfall

Technical communication

Vendor management

Education

Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or related field

Tools

Jira

MS Project

Confluence

Smartsheet

Job description

Join the leading chiplet startup! As an Eliyan Principal Technical Program Manager, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet-based systems with best-in-class power, area, manufacturability, and design flexibility. You will drive day-to-day execution across multiple concurrent advanced packaging, SI/PI, and system integration programs — from early feasibility through qualification and production ramp — in close coordination with our broader ASIC development and platform programs. You will work with a cross-functional team of experts who operate from first principles, innovate, and push the envelope to create high-volume, high-performance manufacturable products. We offer a fun work environment with excellent benefits.

ON-SITE (BAY AREA)

This role sits at the intersection of packaging, signal/power integrity, and system design. As a Principal Technical Program Manager, you will own the schedule, risk, and cross-team strategy for our packaging and SI/PI program portfolio, translating between analog and digital design teams, package and substrate engineers, and external vendors to keep every program on track. You will set the standard for how packaging programs are planned and executed across the company and represent packaging and system integration to executive leadership. Strong candidates are comfortable coming up to speed quickly on unfamiliar technical territory, spot bottlenecks before they become critical-path problems, and know how to drive a room of engineers toward a resolution.

• Packaging & SI/PI Program Execution: Own and drive program schedules for advanced packaging and SI/PI workstreams — including 2.5D/3D IC integration, chiplet interposer/substrate design, bump/RDL planning, and co-packaged optics (CPO) — from early feasibility through qualification and production ramp, ensuring milestones stay synchronized with die-level tapeout schedules.
• Technical Fluency Across the Design Flow: Maintain a deep working understanding of SI/PI, package, and system design flows — including inputs, outputs, and inter-stage dependencies — with the ability to engage meaningfully with analog and digital design teams as well as external vendors and suppliers.
• Multi-Program Portfolio Management: Manage multiple concurrent packaging and SI/PI projects simultaneously with clear, real-time visibility into the status of each. Assess and communicate the downstream impact of new or unplanned work on existing commitments, and confidently adjust priorities — or push back — when scope conflicts arise.
• Rapid Ramp-Up & Structured Problem-Solving: Rapidly come up to speed on new projects and unfamiliar technical domains, quickly identify technical and schedule bottlenecks, and drive structured brainstorming sessions to unblock the team and keep programs on track.
• Cross-Functional Coordination: Work closely with internal teams — including package/SI-PI engineering, physical design, DFT, analog design, PCB and platform design, silicon bring-up, and optical product development — to keep packaging milestones aligned with the broader ASIC and platform program.
• OSAT & Foundry/Vendor Management: Manage relationships and schedules with outsourced assembly and test (OSAT) partners, substrate vendors, and foundries; track packaging-specific deliverables (interposer fab, flip-chip assembly, bump qualification, reliability testing) against committed timelines.
• Customer & Partner Interface: Interface directly with customers and technology partners on packaging-related deliverables, co-design requirements, and integration milestones — particularly for CPO and advanced heterogeneous integration programs.
• Schedule and Risk Management: Define program timelines, set milestones (DOE runs, qualification builds, reliability testing cycles), and proactively identify and mitigate risks specific to advanced packaging technologies (yield, assembly tolerances, thermal/mechanical qualification).
• Budget & Resource Allocation: Own packaging program budgets, allocate resources across internal engineering and external OSAT/substrate partners, and track expenses to optimize development efforts.
• Technical Reviews & Reporting: Lead regular program reviews, maintain clear documentation of program status and risk, and report progress to executive leadership and key stakeholders using dashboards and structured status updates.
• Process Improvement: Define and continuously improve program management best practices specific to packaging, SI/PI, and advanced integration workflows, improving execution efficiency across teams and projects.
• Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field.
• 15+ years of experience in semiconductor program management, with substantial hands-on experience in advanced packaging (2.5D/3D integration, flip-chip, interposers, substrate/RDL, CoWoS/InFO/EMIB or equivalent) and/or SI/PI program execution.
• Deep technical fluency across SI/PI, package, and system design flows, with credibility engaging analog and digital design teams and external vendors.
• Develop ability to manage multiple concurrent projects with clear, real-time visibility into status and sound judgment on reprioritization when scope conflicts arise.
• Track record of ramping quickly on new or unfamiliar technical domains and resolving bottlenecks through structured problem-solving.
• Experience managing OSAT, substrate vendor, and foundry relationships through qualification and production.
• Strong understanding of the packaging development lifecycle, including design rules, assembly processes, reliability qualification (thermal cycling, HTOL, THB), and DFM/DFR considerations.
• Excellent problem-solving, leadership, and decision-making skills, particularly in navigating cross-functional tradeoffs between silicon design, packaging, and manufacturing constraints.
• Strong verbal and written communication skills, comfortable interfacing with both technical and non-technical stakeholders, including customers and external partners.
• Experience with project management tools (e.g., Jira, MS Project, Confluence, Smartsheet) and methodologies (Agile, Waterfall).

• Experience with co-packaged optics (CPO) or advanced heterogeneous integration.
• Knowledge of high-performance computing, AI/ML accelerator packaging, or networking ASIC packaging.
• Familiarity with signal/power integrity simulation and analysis at the package or system level.
• Experience standing up program dashboards, RAID logs, or portfolio-level reporting for multi-project environments.

• Work at the forefront of chiplet interconnect technology, defining the next generation of high-performance, power-efficient chip-to-chip communication.
• High-visibility role with direct exposure to founders and executive leadership.
• Competitive salary, meaningful equity, and comprehensive benefits.
• A collaborative, first-principles culture where your ideas and ownership directly shape outcomes.