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Rambus, a premier chip and silicon IP provider, seeks a Principal Logic Design Engineer in Hillsboro, Oregon. You will lead RTL design for high-performance memory controllers and define micro-architecture, reporting to the Director of Engineering as an IC contributor.
The role emphasizes deep SystemVerilog/Verilog expertise, collaboration with verification and physical design teams, and a hybrid work model with three onsite days per week. Strong communication is required.
Rambus, a premier chip and silicon IP provider, seeks a Principal Logic Design Engineer in Hillsboro, Oregon. You will lead RTL design for high-performance memory controllers and define micro-architecture, reporting to the Director of Engineering as an IC contributor.
The role emphasizes deep SystemVerilog/Verilog expertise, collaboration with verification and physical design teams, and a hybrid work model with three onsite days per week. Strong communication is required.